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ECEN 350 QUESTIONS AND ANSWERS

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ECEN 350 QUESTIONS AND ANSWERS

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ECEN 350 QUESTIONS AND ANSWERS


t/f C is a low-level language and ARMv8 assembly is a high-level language. - Answer -
F

The ________ of a processor defines its hardware software interface. - Answer -ISA
architecture

t/f A higher frequency processor will always have higher performance than a lower
frequency processor. - Answer -F

T/f There is a one-to-one matching between lines of C and lines of an assembly
language. - Answer -F

T/f There is a one-to-one matching between lines of an assembly language and lines of
its machine language. - Answer -T

t/f The complier permanently assigns each register to one and only one variable at
compile time. That register is never used for anything else. - Answer -F

Because of the limited number of registers, the compiler must constantly reuse registers
for different variables over the course of the program.

Typical, ARMv8 R-Type arithmetic instructions have exactly _______ operands. -
Answer -3
three

Translate the following assembly instruction to machine code in binary:
SUB X0, X1, X2 - Answer -11001011000000100000000000100000

Twos complement representations of negative numbers are particularly in useful digital
design because the same hardware can be used for addition and __________. -
Answer -subtraction

The XZR register is hard coded to produce a ________ value when read and to ignore
writes. - Answer -0
zero

What is left in the variable z after the following code is run:
int *p, x, z;
p=&x;
x=4;
z=*p; - Answer -4

, Which of the following correctly describes the effect of this load instruction:
LDUR X3, [X3, 0x10]
Where X3 initially has the value of 0x12340 in it and memory addresses given below
contain the following values.
0x12330: 0x00
0x12338: 0xff
0x12340: 0x34
0x12348: 0x29
0x12350: 0xa7 - Answer -The value 0xa7 is copied into X3.

T/F ARMv8 and many other RISC ISAs are considered to be a "Load/Store
Architecture" because many computational instructions operate directly on the memory.
- Answer -F
CISC instruction sets may have instructions that operate directly on the memory, but
RISC instruction sets are often load/store because they must first move from memory
with a separate load instruction, perform the computation and store back with a store
instruction.

T/F ARMv8 assembly strongly enforces type on registers. - Answer -F
Registers can be used to hold data values that can then immediately be used as
addresses or text.  The hardware makes no distinction.

Given the following instruction:
LDURB X1, [X2, 0x4]
Where X1 = 0x123456789abcdef0
and X2 = 0x0
and memory currently has the following data:
AddressData0x00xDEADBEEF123456780x80xBA5EBA11F005BA11

What will be left in X1 after the instruction executes on a little-endian machine? -
Answer -0xef
0x00000000000000ef

T/F In general, control flow instructions do no work, i.e. they manipulate no data. -
Answer -T
Control flow instructions choose which instruction will be exectued next but they do not
change the state of the processor otherwise.

If a function calls a subsequent function, it must save _______ on the stack, or it will be
unable to return properly. - Answer -LR
X30
return address

T/F During the course of a given program the stack will always grow and never shrink. -
Answer -T
The stack will grow with each function call and shrink on each return.

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