IT 101 Microcomputer Organization
Comprehensive Final Exam (Qns & Ans)
2025
Question 1 (Multiple Choice)
Question:
Which of the following statements best contrasts RISC and CISC
microprocessor architectures?
A) RISC processors use variable-length instructions, while CISC
processors use fixed-length instructions.
B) RISC processors use a reduced set of simple instructions with
fixed-length encoding and predominately register-to-register
operations, whereas CISC processors provide a rich set of
variable-length instructions capable of complex memory
operations.
C) RISC processors rely on microprogramming for control, while
CISC processors are controlled by hardwired logic.
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,D) RISC processors generally support a larger instruction set than
CISC processors.
Correct ANS:
B) RISC processors use a reduced set of simple instructions with
fixed-length encoding and predominately register-to-register
operations, whereas CISC processors provide a rich set of
variable-length instructions capable of complex memory
operations.
Rationale:
Option B accurately captures the primary distinctions. RISC
(Reduced Instruction Set Computer) architectures emphasize a
smaller number of simple instructions, constant instruction
lengths, and a heavy reliance on registers, which simplifies
pipelining. CISC (Complex Instruction Set Computer) designs, by
contrast, support a more extensive, variable-length instruction set
capable of performing multi-step operations in one instruction.
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Question 2 (Fill in the Blank)
Question:
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,The hardware mechanism that predicts the outcome of conditional
branch instructions to minimize pipeline stalls is called
________ .
Correct ANS:
branch prediction
Rationale:
Branch prediction helps maintain pipeline performance by
guessing the direction of branch instructions. This technique
reduces the penalties associated with control hazards, as the
processor continues to fetch and execute instructions based on its
predictions.
---
Question 3 (True/False)
Question:
True/False: Hardwired control units typically offer faster
instruction execution compared to microprogrammed control units
because they do not rely on a slower control memory.
Correct ANS:
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, True
Rationale:
Hardwired control units use combinational logic to control
signals, which allows for faster operation because they eliminate
the delay introduced by fetching microinstructions from control
memory. However, they are less flexible than microprogrammed
units.
---
Question 4 (Multiple Response)
Question:
Select all the factors that are critical for effective cache memory
organization in microcomputers:
A) Cache size
B) Cache block (line) size
C) Cache associativity
D) Replacement policy
E) Instruction set complexity
Correct ANS:
©2025
Comprehensive Final Exam (Qns & Ans)
2025
Question 1 (Multiple Choice)
Question:
Which of the following statements best contrasts RISC and CISC
microprocessor architectures?
A) RISC processors use variable-length instructions, while CISC
processors use fixed-length instructions.
B) RISC processors use a reduced set of simple instructions with
fixed-length encoding and predominately register-to-register
operations, whereas CISC processors provide a rich set of
variable-length instructions capable of complex memory
operations.
C) RISC processors rely on microprogramming for control, while
CISC processors are controlled by hardwired logic.
©2025
,D) RISC processors generally support a larger instruction set than
CISC processors.
Correct ANS:
B) RISC processors use a reduced set of simple instructions with
fixed-length encoding and predominately register-to-register
operations, whereas CISC processors provide a rich set of
variable-length instructions capable of complex memory
operations.
Rationale:
Option B accurately captures the primary distinctions. RISC
(Reduced Instruction Set Computer) architectures emphasize a
smaller number of simple instructions, constant instruction
lengths, and a heavy reliance on registers, which simplifies
pipelining. CISC (Complex Instruction Set Computer) designs, by
contrast, support a more extensive, variable-length instruction set
capable of performing multi-step operations in one instruction.
---
Question 2 (Fill in the Blank)
Question:
©2025
,The hardware mechanism that predicts the outcome of conditional
branch instructions to minimize pipeline stalls is called
________ .
Correct ANS:
branch prediction
Rationale:
Branch prediction helps maintain pipeline performance by
guessing the direction of branch instructions. This technique
reduces the penalties associated with control hazards, as the
processor continues to fetch and execute instructions based on its
predictions.
---
Question 3 (True/False)
Question:
True/False: Hardwired control units typically offer faster
instruction execution compared to microprogrammed control units
because they do not rely on a slower control memory.
Correct ANS:
©2025
, True
Rationale:
Hardwired control units use combinational logic to control
signals, which allows for faster operation because they eliminate
the delay introduced by fetching microinstructions from control
memory. However, they are less flexible than microprogrammed
units.
---
Question 4 (Multiple Response)
Question:
Select all the factors that are critical for effective cache memory
organization in microcomputers:
A) Cache size
B) Cache block (line) size
C) Cache associativity
D) Replacement policy
E) Instruction set complexity
Correct ANS:
©2025
