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Computer Architecture Quiz Questions and answer 100% correct

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Computer Architecture Quiz Questions and answer 100% correct T/F: The MESI protocol is a directory-based cache coherency protocol. - correct answer False T/F: A snoopy-based protocol relies on the bus as a broadcast medium to support cache coherency. - correct answer True T/F: OpenMP supports shared-memory parallel programming. - correct answer True T/F: The miss rate of a direct-mapped cache of size 2X is about the same as the miss rate of a two-way set-associative cache of size X. - correct answer True T/F: Directory-based cache coherency is used in distributed shared-memory architectures and delivers uniform memory access (UMA). - correct answer True T/F: OpenMP is an industry standard API of compiler directives and library routines for parallel programming in C/C++ and Fortran. - correct answer True T/F: In an OpenMP parallel region, the default behavior is that all variables are shared variables. - correct answer True What is true of Ope

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Computer Architecture Quiz Questions
and answer 100% correct
T/F: The MESI protocol is a directory-based cache coherency protocol. -
correct answer ✔False


T/F: A snoopy-based protocol relies on the bus as a broadcast medium to
support cache coherency. - correct answer ✔True


T/F: OpenMP supports shared-memory parallel programming. - correct
answer ✔True


T/F: The miss rate of a direct-mapped cache of size 2X is about the same as
the miss rate of a two-way set-associative cache of size X. - correct answer
✔True


T/F: Directory-based cache coherency is used in distributed shared-memory
architectures and delivers uniform memory access (UMA). - correct answer
✔True


T/F: OpenMP is an industry standard API of compiler directives and library
routines for parallel programming in C/C++ and Fortran. - correct answer
✔True


T/F: In an OpenMP parallel region, the default behavior is that all variables are
shared variables. - correct answer ✔True


What is true of OpenMP worksharing directives?
Implied barrier on entry

, Divides work in an enclosed region among threads
Implied barried upon exit - correct answer ✔Divides work in an enclosed
region among threads and has an implied barrier upon exit


Based on a seminal study on "Simultaneous Multithreading: Maximizing On-
chip Parallelism" by Tullsen et al., as shown in class, approximately how often
is the processor actually busy doing actual computation on average? - correct
answer ✔20%


T/F: Hyperthreading is Intel's version of simultaneous multithreading (SMT). -
correct answer ✔True


T/F: Fine-grained multithreading seeks to context-switch among threads every
clock cycle. - correct answer ✔True


T/F: Hyperthreading always improves the performance of multi-threaded
programs. - correct answer ✔False


What hazard(s) must be resolved in an in-order issue and in-order completion
pipeline? - correct answer ✔RAW Hazards


What hazard(s) must be resolved in an in-order issue and out-of-order
completion pipeline? - correct answer ✔RAW, WAR, WAW Hazards


What hazard(s) must be resolved in an out-of-order issue and out-of-order
completion pipeline? - correct answer ✔RAW, WAR, WAW Hazards


T/F: Static branch prediction predicts the direction of a branch based on the
last result of a branch. - correct answer ✔True

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