CECS 341 MIDTERM QUESTIONS &
ANSWERS (GRADED A+)
For the following MIPS assembly language instruction, first determine the instruction
type, and the decimal value of each field of the instruction. Next, assemble the
instructions to the binary machine code.
(a) sub $s0, $s1, $zero - ANSWERR-type
source registers: $s1 (rs), $zero (rt)
destination register: $s0 (rd)
opcode Rs Rt Rd shamt funct:
0 17 0 16 0 34
000000 10001 00000 10000 00000 100010
binary: 0000 0010 0010 0000 1000 0000 0010 0010
hexadecimal: 0x02208022
For the following MIPS assembly language instruction, first determine the instruction
type, and the decimal value of each field of the instruction. Next, assemble the
instructions to the binary machine code.
(b) lw $s5, 132($t1) - ANSWERI-type
source register: $t1 (rs)
destination register: $s5 (rt)
opcode Rs Rt Immediate
35 9 21 132
100011 01001 10101 0000000010000100
binary: 1000 1101 0011 0101 0000 0000 1000 0100
hexadecimal: 0x8D350084
Reduced Instruction Set Computer (RISC) - ANSWERA type of processor
architecture that includes a set of simple instructions that can each be executed in a
single clock cycle.
A type of processor architecture that includes a set of simple instructions that can
each be executed in a single clock cycle. - ANSWERSet of simple instructions.
Each instruction is executed in a single clock cycle. Uses specialized instructions
(load and store) to access memory.
Uniform instruction format (requires less decoding). Large set of identical general
purpose registers (simplifies compiler design).
Simple addressing modes.
Can be easily pipelined (a technique that allows multiple instructions to be executed
simultaneously).
Convert the given numbers to the remaining bases (binary, decimal, hexadecimal).
Assume that all numbers are unsigned
, (a) Binary = 101101001 = 1 0110 1001 - ANSWERdecimal: 256 + 64 + 32 + 8 + 1 =
361
hexadecimal: 169
Convert the given numbers to the remaining bases (binary, decimal, hexadecimal).
Assume that all numbers are unsigned
(b) Hexadecimal = C49E - ANSWERbinary: 1100 0100 1001 1110
decimal: (12 * 16^3) + (4 * 16^2) + (9 * 16^1) + (14 * 16^0)
= 50,334
Convert the given numbers to the remaining bases (binary, decimal, hexadecimal).
Assume that all numbers are unsigned
Decimal = 372 - ANSWERbinary: 256 + 64 + 32 + 16 + 4
= 0001 0111 0100
hexadecimal: 174
Calculate the binary representation of the decimal number 63.25. Assume that the
floating-point representation format is IEEE 754 single precision. - ANSWER63.25 *
100 = 111111.01 * 20
We normalize the number and move the binary point 5 digits to the left => 1.1111101
* 25
Sign = positive, exp = 127 + 5 = 132
Final bit pattern:
0 1000 0100 1111 1010 0000 0000 0000 000 =
= 0100 0010 0111 1101 0000
0000 0000 0000 = 0x427D0000
Use the timing specifications provided below calculate the required time for each of
the following actions:
I-Mem: 100 ps
Add: 70 ps
Mux: 20 ps
ALU: 95 ps
Registers: 90s
D-Mem: 250 ps
Sign-Ext: 15 ps
Shift-left: 10 ps
(a) execute SUB - ANSWERstep 1. R[A] ← R[Rs] 90 ps
step 2. R[B] ← R[Rt] 90 ps
step 3. R[Rd] ← R[A] - R[B] 95 ps
Use the timing specifications provided below calculate the required time for each of
the following actions:
I-Mem: 100 ps
Add: 70 ps
Mux: 20 ps
ANSWERS (GRADED A+)
For the following MIPS assembly language instruction, first determine the instruction
type, and the decimal value of each field of the instruction. Next, assemble the
instructions to the binary machine code.
(a) sub $s0, $s1, $zero - ANSWERR-type
source registers: $s1 (rs), $zero (rt)
destination register: $s0 (rd)
opcode Rs Rt Rd shamt funct:
0 17 0 16 0 34
000000 10001 00000 10000 00000 100010
binary: 0000 0010 0010 0000 1000 0000 0010 0010
hexadecimal: 0x02208022
For the following MIPS assembly language instruction, first determine the instruction
type, and the decimal value of each field of the instruction. Next, assemble the
instructions to the binary machine code.
(b) lw $s5, 132($t1) - ANSWERI-type
source register: $t1 (rs)
destination register: $s5 (rt)
opcode Rs Rt Immediate
35 9 21 132
100011 01001 10101 0000000010000100
binary: 1000 1101 0011 0101 0000 0000 1000 0100
hexadecimal: 0x8D350084
Reduced Instruction Set Computer (RISC) - ANSWERA type of processor
architecture that includes a set of simple instructions that can each be executed in a
single clock cycle.
A type of processor architecture that includes a set of simple instructions that can
each be executed in a single clock cycle. - ANSWERSet of simple instructions.
Each instruction is executed in a single clock cycle. Uses specialized instructions
(load and store) to access memory.
Uniform instruction format (requires less decoding). Large set of identical general
purpose registers (simplifies compiler design).
Simple addressing modes.
Can be easily pipelined (a technique that allows multiple instructions to be executed
simultaneously).
Convert the given numbers to the remaining bases (binary, decimal, hexadecimal).
Assume that all numbers are unsigned
, (a) Binary = 101101001 = 1 0110 1001 - ANSWERdecimal: 256 + 64 + 32 + 8 + 1 =
361
hexadecimal: 169
Convert the given numbers to the remaining bases (binary, decimal, hexadecimal).
Assume that all numbers are unsigned
(b) Hexadecimal = C49E - ANSWERbinary: 1100 0100 1001 1110
decimal: (12 * 16^3) + (4 * 16^2) + (9 * 16^1) + (14 * 16^0)
= 50,334
Convert the given numbers to the remaining bases (binary, decimal, hexadecimal).
Assume that all numbers are unsigned
Decimal = 372 - ANSWERbinary: 256 + 64 + 32 + 16 + 4
= 0001 0111 0100
hexadecimal: 174
Calculate the binary representation of the decimal number 63.25. Assume that the
floating-point representation format is IEEE 754 single precision. - ANSWER63.25 *
100 = 111111.01 * 20
We normalize the number and move the binary point 5 digits to the left => 1.1111101
* 25
Sign = positive, exp = 127 + 5 = 132
Final bit pattern:
0 1000 0100 1111 1010 0000 0000 0000 000 =
= 0100 0010 0111 1101 0000
0000 0000 0000 = 0x427D0000
Use the timing specifications provided below calculate the required time for each of
the following actions:
I-Mem: 100 ps
Add: 70 ps
Mux: 20 ps
ALU: 95 ps
Registers: 90s
D-Mem: 250 ps
Sign-Ext: 15 ps
Shift-left: 10 ps
(a) execute SUB - ANSWERstep 1. R[A] ← R[Rs] 90 ps
step 2. R[B] ← R[Rt] 90 ps
step 3. R[Rd] ← R[A] - R[B] 95 ps
Use the timing specifications provided below calculate the required time for each of
the following actions:
I-Mem: 100 ps
Add: 70 ps
Mux: 20 ps
