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WGU C952 Computer architecture Exam Review Questions and A Level Marking Scheme Latest 2024/2025

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WGU C952 Computer architecture Exam Review Questions and A Level Marking Scheme Latest 2024/2025 Physical address - correct answer an address in main memory Page fault - correct answer an event that occurs when an accessed page is not present in main memory Virtual address - correct answer an address that corresponds to a location in virtual space and is translated by address mapping to a physical address when memory is accessed Address translation (address mapping) - correct answer the process by which a virtual address is mapped to an address used to access memory Segmentaion - correct answer a variable-sized address mapping scheme in which an address consists of two parts; a segment number, which is mapped to a physical address, and a segment offset Page table - correct answer a table containing the virtual to physical address translations in a virtual memory system. The table which is stored in memory, is typically indexed by the virtual page number; Each entry in the table contains the physical page number for that virtual page is the page is currently in memory Swap space - correct answer the space on the disk reserved for the full virtual memory space of a process Translation lookaside buffer (tlb) - correct answer a cache that keeps track of recently used address mappings to try to avoid an access to the page table Virtually addressed cache - correct answer cache that is accessed with a virtual address rather than a physical address

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WGU C952 Computer architecture Exam Review
Questions and A Level Marking Scheme Latest
2024/2025

Physical address - correct answer an address in main memory


Page fault - correct answer an event that occurs when an accessed page is not
present in main memory


Virtual address - correct answer an address that corresponds to a location in virtual
space and is translated by address mapping to a physical address when memory is
accessed


Address translation (address mapping) - correct answer the process by which a virtual
address is mapped to an address used to access memory


Segmentaion - correct answer a variable-sized address mapping scheme in which an
address consists of two parts; a segment number, which is mapped to a physical
address, and a segment offset


Page table - correct answer a table containing the virtual to physical address
translations in a virtual memory system.


The table which is stored in memory, is typically indexed by the virtual page number;


Each entry in the table contains the physical page number for that virtual page is the
page is currently in memory


Swap space - correct answer the space on the disk reserved for the full virtual memory
space of a process

, Translation lookaside buffer (tlb) - correct answer a cache that keeps track of recently
used address mappings to try to avoid an access to the page table


Virtually addressed cache - correct answer cache that is accessed with a virtual
address rather than a physical address


Aliasiing - correct answer a siutation in which two addresses access the same object;


It can occur in virtual memory when there are two virtual addresses for the same
physical page


Physically addressed cache - correct answer a cache that is addressed by a physical
address


Supervisor mode (kernal mode) - correct answer a mode indicating that a running
process is an operating system process


System call - correct answer a special instruction that transfers control from user mode
to a dedicated location in supervisor code space, invoking the exception mechanism in
the process


Context switch - correct answer a changing of the internal state of the processor to
allow different process to use the processor that includes saving the state needed to
return to the currently executing process


Multiprocessor - correct answer a computer system with at least two processors


This computer is in contrast to a uniprocessor, which has one, and is increasingly hard
to find today


Task level parallelism - correct answer utilizing multiple processors by running
independent programs simultaneously

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