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D386 Computer Architecture and Operating Systems Study Guide (2026/2027) | WGU Complete Exam Review

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D386 Computer Architecture and Operating Systems Study Guide (2026/2027) designed for Western Governors University students preparing for the D386 assessment. This focused resource supports review of computer architecture, operating systems, processors, memory, hardware, system structure, and related core concepts in an exam-focused format. D386 Study, Computer Architecture, Operating Systems, WGU D386, Exam Review, Assessment Prep, Computer Systems, Hardware Study, OS Study, Exam Prep D386 Computer Architecture and Operating Systems Study Guide 2026/2027, WGU D386 Computer Architecture and Operating Systems, D386 Computer Architecture Study Guide, D386 Operating Systems Study Guide, WGU D386 Exam Review 2026/2027, D386 WGU Study Guide, WGU D386 Assessment Prep, D386 Computer Systems Exam Prep, D386 Hardware and Operating Systems Review, D386 Processor and Memory Study Guide, WGU Computer Architecture Exam Prep, D386 Operating Systems Exam Review, D386 Computer Architecture Study Notes, D386 System Structure Review, D386 Complete Exam Review, WGU D386 Study Notes, D386 Hardware Concepts Study Guide, D386 Operating System Concepts Review, D386 Computer Systems Assessment Prep, Western Governors University D386 Study Guide

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,Suggested Study Guide - Essentials
✅ 1. CPU, ALU, CU, Registers, and Cache Memory
● The Central Processing Unit (CPU), often referred to as the brain of the computer, is a crucial
component responsible for executing instructions from computer programs.
● Key Components:
○ Arithmetic Logic Unit (ALU)
■ Function: Performs arithmetic and logical operations (addition, subtraction,
multiplication, division, AND, OR, NOT, etc.).
■ Importance: Essential for executing mathematical calculations and decision-
making processes.
○ Control Unit (CU)
■ Function: Directs the operation of the processor. It tells the computer's memory,
ALU, and I/O devices how to respond to the instructions that have been sent to
the processor.
■ Importance: Coordinates how data moves around the CPU and controls the flow
of data between the CPU and other components of the computer.
○ Registers
■ Function: Small, fast storage locations within the CPU that hold data and
instructions temporarily.
■ Types: Common registers include -
● Accumulator (ACC): The accumulator is a register that stores the results
of arithmetic and logical operations performed by the CPU's Arithmetic
Logic Unit (ALU). It holds the intermediate results of calculations during
program execution.
● Program Counter (PC): The program counter is a special register that
holds the memory address of the next instruction to be fetched and
executed by the CPU.
● Memory Address Register (MAR): The memory address register is a
register that holds the memory address of the data or instruction being
accessed or manipulated in the computer's memory.
● Memory Data Register (MDR): The memory data register is a register that
temporarily holds the data fetched from or to be written to the
computer's memory.
■ Importance: Provide quick access to frequently used data and instructions,
enhancing processing speed.
○ Cache Memory Levels
■ Function: Provides high-speed data access to the CPU, reducing the time needed
to fetch data from the main memory (RAM).
■ Importance: Larger and faster caches can significantly improve CPU
performance.
■ L1 Cache
● Proximity to CPU: Closest to the CPU cores.
● Speed: Fastest among all cache levels due to its proximity and high-
speed SRAM technology.

, ● Size: Smallest in size, typically ranging from 16KB to 128KB per core.
● Purpose: Primarily stores frequently accessed data and instructions to
reduce latency and improve the CPU's processing speed.
● Structure: Often split into two separate caches: one for instructions (L1i)
and one for data (L1d).
■ L2 Cache
● Proximity to CPU: Sits between the L1 cache and the main memory
(RAM).
● Speed: Slower than L1 but faster than L3 cache and main memory.
● Size: Larger than L1, typically ranging from 256KB to several megabytes
per core.
● Purpose: Acts as an intermediary store between L1 and L3, holding data
and instructions that are less frequently accessed than those in L1 but
more frequently than those in RAM.
● Structure: Can be either unified (storing both data and instructions) or
split, similar to L1.
■ L3 Cache
● Proximity to CPU: Shared among multiple CPU cores within the same
processor.
● Speed: Slower than L2 but faster than main memory.
● Size: Larger than L2, typically ranging from a few megabytes to tens of
megabytes, depending on the CPU architecture.
● Purpose: Provides a larger, shared cache that can store data and
instructions accessible by all cores, reducing the need to fetch from
slower main memory.
● Structure: Typically unified, storing both data and instructions.


✅ 2. Pipelining vs. Multithreading vs. Multitasking
○ Pipelining (CPU function) is a hardware technique to increase the instruction throughput
of a CPU by overlapping instruction execution stages.
■ Stages of Pipelining
● Fetch: Retrieving the instruction from memory.
● Decode: Interpreting the instruction and preparing the necessary control
signals.
● Execute: Performing the operation specified by the instruction (e.g.,
arithmetic or logic operations).
● Memory Access: Reading from or writing to memory, if required by the
instruction.
● Write Back: Writing the result back to the register file.
○ Multithreading (Application function) involves executing multiple threads within a single
process concurrently, improving CPU utilization and performance for multithreaded
applications.
■ Thread: A thread is the smallest unit of execution within a process. A process
can contain multiple threads, each running independently but sharing the same
resources, such as memory and file handles.

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