Computer Science Paper 1
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,Control Unit A register in the cpu that controls and coordinates the activities of the cpu directing
the flow of data
Bus a series of connectors that transfer signals between internal components
Memory Read causes data from the addressed location in RAM to be placed on the data bus
Memory Write Causes data on the data bus to be written into the addressed location.
Bus Request Indicates that a device is requesting the use of the data bus
Bus Grant Indicates that the CPU has granted access to the data bus.
System bus collective term for address, data and control bus
Data bus A bi-directional path for moving data and instructions between system components
Clock used to synchronize operations
Control bus A bi-directional bus to transmit command, timing and specific status information
between system components
Address bus A one directional bus that transmits memory addresses that are used as operands
in programming instructions, so that data can be retrieved from main memory
ALU Arithmetic-Logic unit, preforms logical and arithmetic operations on data
e.g. ADD, SUBTRACT, shift operations or Boolean logic
,Registers High speed memory cells, all arithmetic and logic happens in these, typically there
are 16 general purpose registers in a CPU, they are very fast
Accumulator A special purpose register which stores the result of calculations made by the ALU
Program Counter (PC) Holds the address of the next instruction to be executed, this can be the next
instruction in a sequence of instructions, or a branch/ jump
Current instruction register (CIR) stores the actual instruction that is being decoded
Memory address register (MAR) stores the address of instructions and data that need to be fetched from or sent to
memory
Memory data register (MDR) stores the data which is to be sent or fetched from memory
Interrupt registers generates and detects interrupts
Fetch Decode Execute register sequence PC
MAR
Address Bus
Memory
Data bus
MDR
CIR
Decode Unit
MAR
Address Bus
Main Memory
Fetch phase - Instructions pulled from memory and stored in main memory.
- Program Counter (a register) stores the address location of the instruction
- Program Counter and instructions are placed in the Instruction Register (IR)
- Program Counter is incremented by 1
, Decode phase 1. Instruction in CIR is decoded
2. Instruction is split into opcode and operand
3. the operand determines the type of instruction
- if its the address of the data used with the operation it is copied into the MAR
- if it the actual data to be operated on it is copied into the MDR
4. the data to be operated on is passed into the ALU/ acc
Execute phase The appropriate instruction/ opcode is carried out on the data/ operand
Main factors affecting preformance - Clock speed
- Number of cores
- The amount and type of cache
Clock speed The system clock generates a series of signals (1 or 0) synchronising with the CPU
operations. The CPU cannot preform faster than the system clock.
Positives of increasing clock speed You can carry out more instructions in a given time; improved performance
What is clock speed measured in? Hz
Negatives of increasing clock speed more heat generated meaning computers must be cooled (either with heat sync/fan
or water/oil cooling)
Positive of multiple cores may speed processing as concurrency is available
negatives of multiple cores complicated circuitry (more expensive)
doesn't always improve performance
Positives of increasing cache size less time fetching data; improved performance
Negatives of increasing cache size expensive, physically further from cpu and thus slower
Level 1 cache Small but extremely fast
2026 | Study Guide,
Practice Questions,
Answers, Rationales &
Exam Review | Complete
Ethics Study Guide
Updated 2026 Questions and Answers
100% Verified Exam Prep and Comprehensive
Rationales
Included
,Control Unit A register in the cpu that controls and coordinates the activities of the cpu directing
the flow of data
Bus a series of connectors that transfer signals between internal components
Memory Read causes data from the addressed location in RAM to be placed on the data bus
Memory Write Causes data on the data bus to be written into the addressed location.
Bus Request Indicates that a device is requesting the use of the data bus
Bus Grant Indicates that the CPU has granted access to the data bus.
System bus collective term for address, data and control bus
Data bus A bi-directional path for moving data and instructions between system components
Clock used to synchronize operations
Control bus A bi-directional bus to transmit command, timing and specific status information
between system components
Address bus A one directional bus that transmits memory addresses that are used as operands
in programming instructions, so that data can be retrieved from main memory
ALU Arithmetic-Logic unit, preforms logical and arithmetic operations on data
e.g. ADD, SUBTRACT, shift operations or Boolean logic
,Registers High speed memory cells, all arithmetic and logic happens in these, typically there
are 16 general purpose registers in a CPU, they are very fast
Accumulator A special purpose register which stores the result of calculations made by the ALU
Program Counter (PC) Holds the address of the next instruction to be executed, this can be the next
instruction in a sequence of instructions, or a branch/ jump
Current instruction register (CIR) stores the actual instruction that is being decoded
Memory address register (MAR) stores the address of instructions and data that need to be fetched from or sent to
memory
Memory data register (MDR) stores the data which is to be sent or fetched from memory
Interrupt registers generates and detects interrupts
Fetch Decode Execute register sequence PC
MAR
Address Bus
Memory
Data bus
MDR
CIR
Decode Unit
MAR
Address Bus
Main Memory
Fetch phase - Instructions pulled from memory and stored in main memory.
- Program Counter (a register) stores the address location of the instruction
- Program Counter and instructions are placed in the Instruction Register (IR)
- Program Counter is incremented by 1
, Decode phase 1. Instruction in CIR is decoded
2. Instruction is split into opcode and operand
3. the operand determines the type of instruction
- if its the address of the data used with the operation it is copied into the MAR
- if it the actual data to be operated on it is copied into the MDR
4. the data to be operated on is passed into the ALU/ acc
Execute phase The appropriate instruction/ opcode is carried out on the data/ operand
Main factors affecting preformance - Clock speed
- Number of cores
- The amount and type of cache
Clock speed The system clock generates a series of signals (1 or 0) synchronising with the CPU
operations. The CPU cannot preform faster than the system clock.
Positives of increasing clock speed You can carry out more instructions in a given time; improved performance
What is clock speed measured in? Hz
Negatives of increasing clock speed more heat generated meaning computers must be cooled (either with heat sync/fan
or water/oil cooling)
Positive of multiple cores may speed processing as concurrency is available
negatives of multiple cores complicated circuitry (more expensive)
doesn't always improve performance
Positives of increasing cache size less time fetching data; improved performance
Negatives of increasing cache size expensive, physically further from cpu and thus slower
Level 1 cache Small but extremely fast
