COMPUTER ORGANIZATION AND
ARCHITECTURE (COA) ADVANCED
QUESTIONS AND ANSWERS
1. Which of the following is true regarding Amdahl’s Law in the context of computer
architecture performance improvement?
A. It predicts the theoretical speedup in latency of the execution of a task at fixed workload
that can be expected of a system whose resources are improved.
B. It states that the speedup is independent of the proportion of the execution time that the
improved part occupies.
C. It suggests that doubling the number of processors will always double the speed of any
program.
D. It is primarily used to calculate the power consumption of multi-core processors.
Answer: A
Conceptual Explanation: Amdahl’s Law focuses on the theoretical speedup of a task when
only a portion of the system is improved, emphasizing that the speedup is limited by the
serial fraction of the task.
,2. In a 4-way set-associative cache with 256 blocks and a block size of 16 bytes, how many
bits are used for the ‘index’ in a 32-bit address?
A. 6 bits
B. 4 bits
C. 8 bits
D. 10 bits
Answer: A
Conceptual Explanation: Total blocks = 256. Number of sets = Total blocks / Associativity
= = 64. Index bits = log2(64) = 6 bits.
3. What is the purpose of the ‘Victim Cache’ in a memory hierarchy?
A. To store data that is frequently accessed but not yet in the L1 cache.
B. To manage virtual to physical address translations.
C. To store blocks evicted from the CPU cache due to conflict or capacity misses.
D. To act as a buffer for write-back operations to main memory.
Answer: C
Conceptual Explanation: A victim cache is a small fully associative cache that stores
blocks recently evicted from the main cache to reduce the penalty of conflict misses.
, 4. Which hazard occurs when the hardware does not support the combination of instructions
that are set to execute in the same clock cycle?
A. Data Hazard
B. Control Hazard
C. Structural Hazard
D. Branch Hazard
Answer: C
Conceptual Explanation: Structural hazards arise when two or more instructions in the
pipeline need the same resource (like a single memory port) at the same time.
5. In IEEE 754 single-precision floating-point format, what is the value of the ‘bias’ added to
the exponent?
A. 127
B. 128
C. 1023
D. 255
Answer: A
Conceptual Explanation: For single precision (32-bit), the exponent is 8 bits, and the bias
is calculated as 2^(8-1) - 1 = 127.
ARCHITECTURE (COA) ADVANCED
QUESTIONS AND ANSWERS
1. Which of the following is true regarding Amdahl’s Law in the context of computer
architecture performance improvement?
A. It predicts the theoretical speedup in latency of the execution of a task at fixed workload
that can be expected of a system whose resources are improved.
B. It states that the speedup is independent of the proportion of the execution time that the
improved part occupies.
C. It suggests that doubling the number of processors will always double the speed of any
program.
D. It is primarily used to calculate the power consumption of multi-core processors.
Answer: A
Conceptual Explanation: Amdahl’s Law focuses on the theoretical speedup of a task when
only a portion of the system is improved, emphasizing that the speedup is limited by the
serial fraction of the task.
,2. In a 4-way set-associative cache with 256 blocks and a block size of 16 bytes, how many
bits are used for the ‘index’ in a 32-bit address?
A. 6 bits
B. 4 bits
C. 8 bits
D. 10 bits
Answer: A
Conceptual Explanation: Total blocks = 256. Number of sets = Total blocks / Associativity
= = 64. Index bits = log2(64) = 6 bits.
3. What is the purpose of the ‘Victim Cache’ in a memory hierarchy?
A. To store data that is frequently accessed but not yet in the L1 cache.
B. To manage virtual to physical address translations.
C. To store blocks evicted from the CPU cache due to conflict or capacity misses.
D. To act as a buffer for write-back operations to main memory.
Answer: C
Conceptual Explanation: A victim cache is a small fully associative cache that stores
blocks recently evicted from the main cache to reduce the penalty of conflict misses.
, 4. Which hazard occurs when the hardware does not support the combination of instructions
that are set to execute in the same clock cycle?
A. Data Hazard
B. Control Hazard
C. Structural Hazard
D. Branch Hazard
Answer: C
Conceptual Explanation: Structural hazards arise when two or more instructions in the
pipeline need the same resource (like a single memory port) at the same time.
5. In IEEE 754 single-precision floating-point format, what is the value of the ‘bias’ added to
the exponent?
A. 127
B. 128
C. 1023
D. 255
Answer: A
Conceptual Explanation: For single precision (32-bit), the exponent is 8 bits, and the bias
is calculated as 2^(8-1) - 1 = 127.
