Module 4: Quiz 4
Due Jun 14 at 11:59pm Points 15 Questions 7
Available Jun 8 at 12am - Jun 14 at 11:59pm 7 days
Time Limit 75 Minutes Allowed Attempts 2
Instructions
Quiz 4 covers Module 4 material.
This quiz will allow you for two attempts, and your score will be the average of
your two attempts.
Please keep in mind, that is an individual quiz and having someone else help
you in completing this quiz is a serious violation of the ASU Academic Integrity
Policy that can lead to an XE grade and removal from the engineering school.
Please be advised that the engineering school utilizes technology to detect
violations and rigorously enforces sanctions.
Attempt History
Attempt Time Score
LATEST Attempt 2 2 minutes 13 out of 15
Attempt 1 67 minutes 9 out of 15
Correct answers are hidden.
Score for this attempt: 13 out of 15
Submitted Jun 14 at 2:42pm
This attempt took 2 minutes.
Question 1 pts
The following information pertains to Questions 1 - 4.
https://canvas.asu.edu/courses/54246/quizzes/354399 1/6
, 6/14/2020 Module 4: Quiz 4: EEE202_OL_HY_Circuits I_Sum_20_SC_C)
Consider the network shown below. Notice that this circuit consists of a
single loop input circuit and a single node-pair output circuit.
For Questions 1-3, assume that vi(t) is the unit step function u(t).
What is the initial value of the capacitor voltage vo(0) in the above circuit when
excited by the unit step function source?
0 (V)
1 (V)
-1 (V)
-10 (V)
Question 2 pts
What is the steady-state value of the capacitor voltage vo(∞) in the above circuit
when excited by the unit step function source?
https://canvas.asu.edu/courses/54246/quizzes/354399 2/6