GCSE COMPUTING · OCR J277 · COMPLETE REVISION NOTES
OCR GCSE
Computer Science
Complete revision notes for both components — everything you need to know
Component 1: Computer Systems Component 2: Computational Thinking OCR J277
All 10 Topics Covered
GCSE Computer Science · OCR J277 Complete Revision Resource
,Table of Contents
10 topics covering the full OCR J277 specification
COMPONENT 1 — COMPUTER SYSTEMS
01 Systems Architecture 02 Memory & Storage
03 Networks 04 Network Security
05 Systems Software 06 Ethical, Legal & Cultural Issues
COMPONENT 2 — COMPUTATIONAL THINKING
07 Computational Thinking 08 Programming Techniques
09 Algorithms 10 Data Representation
, 01 Systems Architecture
CPU components, fetch-decode-execute cycle, performance, Von Neumann
THE CPU — CENTRAL PROCESSING UNIT
ALU — ARITHMETIC LOGIC UNIT CONTROL UNIT (CU)
Performs all arithmetic calculations (+, −, ×, ÷) and Directs the operation of the CPU. Fetches instructions
logical comparisons (AND, OR, NOT, XOR). Every from memory, decodes them, and sends signals to
calculation in a program passes through here. other components to execute them.
CACHE REGISTERS
Tiny, ultra-fast memory built into the CPU. Stores Tiny immediate storage inside the CPU. Key ones: PC
frequently used data to avoid slower RAM access. L1 > (Program Counter), MAR (Memory Address Register),
L2 > L3 (L1 is fastest, smallest). MDR (Memory Data Register), ACC (Accumulator).
THE FETCH-DECODE-EXECUTE CYCLE
FETCH: PC holds the address of the next instruction → copied to MAR → instruction fetched from RAM → stored in
MDR → copied to CIR → PC increments
DECODE: Control Unit decodes the instruction in the CIR — works out what operation to perform
EXECUTE: Instruction carried out — e.g. ALU performs calculation, data moved, branch taken
CPU PERFORMANCE FACTORS
Factor Effect Key point
Clock speed Higher GHz = more cycles per second 3.5 GHz = 3.5 billion cycles/sec
Number of cores More cores = more tasks simultaneously Quad-core can run 4 threads at once
Cache size Larger cache = fewer slow RAM accesses More data held close to CPU
VON NEUMANN ARCHITECTURE
KEY PRINCIPLE THE THREE BUSES
Data and instructions are stored together in the same Data bus — carries data between components
memory using the same address space. The CPU Address bus — carries memory addresses
fetches both from RAM via the same buses. Control bus — carries control signals (read/write)
EMBEDDED SYSTEMS
An embedded system is a computer system built into a larger device to perform a specific, dedicated function.
Examples: washing machine controller, car ABS, pacemaker, router. They typically have limited resources and run
firmware.
OCR GCSE
Computer Science
Complete revision notes for both components — everything you need to know
Component 1: Computer Systems Component 2: Computational Thinking OCR J277
All 10 Topics Covered
GCSE Computer Science · OCR J277 Complete Revision Resource
,Table of Contents
10 topics covering the full OCR J277 specification
COMPONENT 1 — COMPUTER SYSTEMS
01 Systems Architecture 02 Memory & Storage
03 Networks 04 Network Security
05 Systems Software 06 Ethical, Legal & Cultural Issues
COMPONENT 2 — COMPUTATIONAL THINKING
07 Computational Thinking 08 Programming Techniques
09 Algorithms 10 Data Representation
, 01 Systems Architecture
CPU components, fetch-decode-execute cycle, performance, Von Neumann
THE CPU — CENTRAL PROCESSING UNIT
ALU — ARITHMETIC LOGIC UNIT CONTROL UNIT (CU)
Performs all arithmetic calculations (+, −, ×, ÷) and Directs the operation of the CPU. Fetches instructions
logical comparisons (AND, OR, NOT, XOR). Every from memory, decodes them, and sends signals to
calculation in a program passes through here. other components to execute them.
CACHE REGISTERS
Tiny, ultra-fast memory built into the CPU. Stores Tiny immediate storage inside the CPU. Key ones: PC
frequently used data to avoid slower RAM access. L1 > (Program Counter), MAR (Memory Address Register),
L2 > L3 (L1 is fastest, smallest). MDR (Memory Data Register), ACC (Accumulator).
THE FETCH-DECODE-EXECUTE CYCLE
FETCH: PC holds the address of the next instruction → copied to MAR → instruction fetched from RAM → stored in
MDR → copied to CIR → PC increments
DECODE: Control Unit decodes the instruction in the CIR — works out what operation to perform
EXECUTE: Instruction carried out — e.g. ALU performs calculation, data moved, branch taken
CPU PERFORMANCE FACTORS
Factor Effect Key point
Clock speed Higher GHz = more cycles per second 3.5 GHz = 3.5 billion cycles/sec
Number of cores More cores = more tasks simultaneously Quad-core can run 4 threads at once
Cache size Larger cache = fewer slow RAM accesses More data held close to CPU
VON NEUMANN ARCHITECTURE
KEY PRINCIPLE THE THREE BUSES
Data and instructions are stored together in the same Data bus — carries data between components
memory using the same address space. The CPU Address bus — carries memory addresses
fetches both from RAM via the same buses. Control bus — carries control signals (read/write)
EMBEDDED SYSTEMS
An embedded system is a computer system built into a larger device to perform a specific, dedicated function.
Examples: washing machine controller, car ABS, pacemaker, router. They typically have limited resources and run
firmware.
