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WGU C952 Practice Exam With Complete Questions And Correct Answers| Brand New Version!

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WGU C952 Practice Exam With Complete Questions And
Correct Answers| Brand New Version!




Memory Hierarchy - -Answer-: concept that is necessary for the CPU to be able to manipulate data.



Strong scaling - -Answer-: Speed-up achieved on a multiprocessor without increasing the size of the
problem.



Weak scaling - -Answer-: Speed-up achieved on a multiprocessor while increasing the size of the
problem proportionally to the increase in the number of processors.



Not bound by Amdah's Law



multiprocessor architecture - -Answer-: A unified graphics and computing multiprocessor executes
vertex, geometry, and pixel fragment shader programs, and parallel computing programs



advantages:

Increased throughput

Cost saving

Increased reliability



Streaming processor (SP) - -Answer-: the primary thread instruction processor in the multiprocessor



Special function unit (SFU) - -Answer-: Compute 32-bit floating-point approximations to reciprocal,
reciprocal square root, and key transcendental functions. It also implements 32-bit floating-point planar
attribute interpolation for pixel shaders, providing accurate interpolation of attributes such as color,
depth, and texture coordinates.

,Uniform Memory Access (UMA) - -Answer-: A multiprocessor in which latency to any word in main
memory is about the same no matter which processor requests the access.



Non-Uniform Memory Access (NUMA) - -Answer-: Varying system memory access times, because of
system hardware.



throughput - -Answer-: the amount of work performed by a system during a given period of time



CPU Time Formula - -Answer-: (Instructions) x (CPI) x (Clock Cycle Time)



Set Associative Cache - -Answer-: A cache that has a fixed number of locations (at least two) where each
block can be placed



(Block number) modulo (Num set in the cache)



Variable

one-way - Original set

two-way - Will improve overall performance

four-way

eight-way



Fully associative cache - -Answer-: A cache structure in which a block can be placed in any location in the
cache.



CDC 6600 - -Answer-: This system is widely considered to have been the first supercomputer. Also first
load-store architecture



Tomasulo's Algorithm - -Answer-: An algorithm for dynamic scheduling and out-of-order execution

, uses dynamic hazard detection, generalized forwarding, and reservation stations.



IBM 7030 - -Answer-: AKA Stretch



Produced with the goal of being 100 times faster than the previous IBM 704



Imprecise interupt - -Answer-: The unpopularity of imprecise interrupts led to the standard of commit
units in dynamically scheduled pipelined processors



Digital Equipment Corporation (DEC) - -Answer-: A major American company in the computer industry
from the 1950s to the 1990s



PDP-8 - -Answer-: First commercial minicomputer introduced by Digital Equipment Corporation



cost under $20,000



Intel 4004 - -Answer-: First microprocessor



supercomputer - -Answer-: a particularly powerful mainframe computer.



Seymour Cray - -Answer-: American inventor of the Cray supercomputer.



Least Significant Bits - -Answer-: The two bits furthest to the right



most significant bit - -Answer-: left most bit



Sign and magnitude representation - -Answer-: a signed number representation where a single bit is
used to represent the sign and the remaining bits represent the magnitude

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