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AQA COMPUTER SCIENCE A LEVEL - COMPUTER ORGANISATION AND ARCHITECTURE EXAM WITH CORRECT RESPONSES.

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AQA COMPUTER SCIENCE A LEVEL - COMPUTER ORGANISATION AND ARCHITECTURE EXAM WITH CORRECT RESPONSES.

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AQA GCSE
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AQA GCSE









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Institution
AQA GCSE
Course
AQA GCSE

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Uploaded on
December 4, 2025
Number of pages
10
Written in
2025/2026
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Exam (elaborations)
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Aqa Computer Science A Level - n n n n n




Computer Organisation And n n n




Architecture Exam With All Answers
n nn n n n




Correct n




What are the steps in the fetch part of the fetch-decode execute cycle (in words)? -
nn nn nn nn nn nn nn nn nn nn nn nn nn nn nn nn




correct answer-1. The contents of the Program Counter are copied onto the MAR
nn nn nn nn nn nn nn nn nn nn nn nn nn




2. The contents of the MAR are transferred to the memory through the address bus
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




where it receives a control signal from the control unit indicating a memory read
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




3. The contents of the memory at the received address are transferred to the MBR
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




through the data bus
nn nn nn nn




At the same time, the PC is incremented by 1
nn nn nn nn nn nn nn nn nn




4. The contents of the MBR are copied onto the CIR
nn nn nn nn nn nn nn nn nn nn




What are the steps in the fetch part of the fetch-decode execute cycle (in register
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




transfer notation)? - correct answer-1. MAR ← [PC]
nn nn nn nn nn nn nn nn nn




2. MBR ← [Memory]addressed
nn nn nn




PC ← [PC] + 1
nn nn nn nn




3. CIR ← [MBR]
nn nn nn

, What are the steps in the decode and execute parts of the fetch-decode execute
nn nn nn nn nn nn nn nn nn nn nn nn nn




cycle? - correct answer-1. Control unit splits the instruction in the CIR into opcode
nn nn nn nn nn nn nn nn nn nn nn nn nn nn nn




and operand
nn nn nn




2. Control unit uses opcode to identify the instruction being executed and the part of
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




the processor executing the instruction
nn nn nn nn nn




3. Control unit generates necessary control signals for execution
nn nn nn nn nn nn nn nn nn




4. Certain actions are performed depending on the instruction
nn nn nn nn nn nn nn nn




What are the possible actions the processor can take in the execute part of the fetch-
nn nn nn nn nn nn nn nn nn nn nn nn nn nn nn




decode execute cycle? - correct answer--Jump/Branch instruction -> PC is updated
nn nn nn nn nn nn nn nn nn nn nn




-Data is required -> Memory or I/O read is issued
nn nn nn nn nn nn nn nn nn




-Arithmetic/Logic operation -> ALU calculates results and stores in register(s) and nn nn nn nn nn nn nn nn nn nn




the status register updates to show overflow or carry
nn nn nn nn nn nn nn nn nn




What happens in the interrupt part of the fetch-decode execute cycle if an interrupt
nn nn nn nn nn nn nn nn nn nn nn nn nn




signal of higher priority has been received by the processor? - correct answer-1.
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




The current process being executed is suspended and the current values of the
nn nn nn nn nn nn nn nn nn nn nn nn nn




registers are pushed to the system stack
nn nn nn nn nn nn nn




2. The appropriate Interrupt Service Routine is found and called to handle the
nn nn nn nn nn nn nn nn nn nn nn nn




interrupt
nn




3. After the interrupt has been serviced, the original values of the registers are
nn nn nn nn nn nn nn nn nn nn nn nn nn




retrieved from the stack and execution continues with the instruction addressed by
nn nn nn nn nn nn nn nn nn nn nn nn




the PC
nn nn




What is an interrupt? - correct answer-A signal sent to the processor that suspends
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




execution of the current process until the interrupt is handled with an Interrupt
nn nn nn nn nn nn nn nn nn nn nn nn nn




Service Routine (ISR)
nn nn nn




What sends interrupts? - correct answer-Hardware devices and software programs
nn nn nn nn nn nn nn nn nn nn




Why do the register contents have to be pushed to the system stack when an
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




interrupt is received? - correct answer-To save the volatile environment as the
nn nn nn nn nn nn nn nn nn nn nn nn nn




registers are going to be overwritten so the values would be lost otherwise
nn nn nn nn nn nn nn nn nn nn nn nn nn




What does the use of interrupts allow a processor to do? - correct answer-Multitask
nn nn nn nn nn nn nn nn nn nn nn nn nn nn




(using time slices and timer interrupts)
nn nn nn nn nn nn




What is hardware? - correct answer-The physical components of a computer system
nn nn nn nn nn nn nn nn nn nn nn nn




In brief, what does the processor do? - correct answer-Processes data and
nn nn nn nn nn nn nn nn nn nn nn nn




instructions by fetching, decoding and executing instructions in the fetch-decode-
nn nn nn nn nn nn nn nn nn nn




execute cycle nn
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