OCR J277 1.1 Systems Architecture
Questions with Correct Answers
CPU - ANSWERSCentral Processing Unit: Fetches, Decodes and Executes instructions
Factors affecting the speed of the CPU - ANSWERSClock speed.
Number of cores,
Cache size.
Size of RAM
Speed is not always increased because it depends on the task and the size of the RAM
Von Neumann Architecture - ANSWERSTraditional computer architecture that forms the
basis of most digital computer systems. Instructions and data are held together in the
same memory space.
The order that the registers are used in the Von Neumann fetch, decode, execute cycle
- ANSWERSTo fetch an instruction:
1. Program Counter to the...(and then value in PC increments by 1)..
2. Memory Address Register to the...
3. Memory Data Register.
Decode may then require data so repeat steps 2 and 3. Results of calculations or an
instruction are stored in the accumulator.
MAR - ANSWERSMemory Address Register: Holds the address of data to be fetched
from, or the address where the data is to be stored.
MDR - ANSWERSMemory Data Register: Holds the data fetched from or to be written
to the memory. Step 3 of the fetch, decode, execute cycle.
PC - ANSWERSProgram Counter: Holds the address of the next instruction to be
fetched from memory. Step 1 of the fetch, decode, execute cycle.
Accumulator - ANSWERSRegister which holds the result of calculations or the results of
an instruction.
ALU - ANSWERSArithmetic Logic Unit: Performs calculations e.g. x = 2 + 3 and logical
comparisons e.g. IF x > 3 in the CPU.
CU - ANSWERSControl Unit: "Decodes and executes instructions. Sends control
signals to control how data moves around the CPU."
Cache - ANSWERSMemory in the processor providing fast access to frequently used
instructions and data.
Questions with Correct Answers
CPU - ANSWERSCentral Processing Unit: Fetches, Decodes and Executes instructions
Factors affecting the speed of the CPU - ANSWERSClock speed.
Number of cores,
Cache size.
Size of RAM
Speed is not always increased because it depends on the task and the size of the RAM
Von Neumann Architecture - ANSWERSTraditional computer architecture that forms the
basis of most digital computer systems. Instructions and data are held together in the
same memory space.
The order that the registers are used in the Von Neumann fetch, decode, execute cycle
- ANSWERSTo fetch an instruction:
1. Program Counter to the...(and then value in PC increments by 1)..
2. Memory Address Register to the...
3. Memory Data Register.
Decode may then require data so repeat steps 2 and 3. Results of calculations or an
instruction are stored in the accumulator.
MAR - ANSWERSMemory Address Register: Holds the address of data to be fetched
from, or the address where the data is to be stored.
MDR - ANSWERSMemory Data Register: Holds the data fetched from or to be written
to the memory. Step 3 of the fetch, decode, execute cycle.
PC - ANSWERSProgram Counter: Holds the address of the next instruction to be
fetched from memory. Step 1 of the fetch, decode, execute cycle.
Accumulator - ANSWERSRegister which holds the result of calculations or the results of
an instruction.
ALU - ANSWERSArithmetic Logic Unit: Performs calculations e.g. x = 2 + 3 and logical
comparisons e.g. IF x > 3 in the CPU.
CU - ANSWERSControl Unit: "Decodes and executes instructions. Sends control
signals to control how data moves around the CPU."
Cache - ANSWERSMemory in the processor providing fast access to frequently used
instructions and data.
