CSCI3130 Final Exam Questions AND Correct Answers
•The exact sequence of microoperations that are carried out
by an instruction can be specified using _____. - ✔✔register
transfer language (RTL)
A full adder logic circuit will have _________________ -
✔✔Three inputs and two outputs
A universal logic gate is one which can be used to generate
any logic function. Which of the following are universal logic
gate? - ✔✔NAND and NOR
Arithmetic-Logic Unit (ALU) - ✔✔carries out logical and
arithmetic operations as directed by the control unit
Associative cache mapping is a type of cache mapping
technique where... - ✔✔... each block in main memory can be
mapped to any block in the cache memory.
Associative Mapping - ✔✔-- Advantage: allow main memory
block to be placed anywherein cache.
,-- Disadvantages: Expensive (requires special hardware);
Requires searching; Limited cache size
Assume the following code:
section .text
mov rdx, 1
mov rax, 8
mov rsi, 2
section .data
myvar: dq 100
Provide the value stored in the register after the following
instructions are executed:
1. DIV rsi
-- value of rsi?
-- value of rax?
-- value of rdx?
2. MOV rdx, 0
,DIV rsi
-- value of rsi?
-- value of rdx?
-- value of rax? - ✔✔1. Rsi = 2, rax = (2^64 + 8)/2, rdx = 0
2. Rsi = 2 rax = 4, rdx = 0
Assume the following code:
section .text
mov rdx, 2
mov rax, 3
mov rsi, 4
section .data
myvar: dq 100
Provide the value stored in the register after the following
instructions are executed:
1. MUL rsi
-- value of rsi?
, -- value of rax?
-- value of rdx?
2. MUL 45
-- value of rdx?
-- value of rax? - ✔✔1. Rsi = 4, rax = 12, rdx = 2
2. Rdx = 2, rax = 135
Assume the following code:
section .text
mov rdx, 20
mov rax, 30
mov rsi, 10
section .data
myvar: dq 100
Given the following instruction:
ADD rax, rdx
-- What is the value of rdx?
•The exact sequence of microoperations that are carried out
by an instruction can be specified using _____. - ✔✔register
transfer language (RTL)
A full adder logic circuit will have _________________ -
✔✔Three inputs and two outputs
A universal logic gate is one which can be used to generate
any logic function. Which of the following are universal logic
gate? - ✔✔NAND and NOR
Arithmetic-Logic Unit (ALU) - ✔✔carries out logical and
arithmetic operations as directed by the control unit
Associative cache mapping is a type of cache mapping
technique where... - ✔✔... each block in main memory can be
mapped to any block in the cache memory.
Associative Mapping - ✔✔-- Advantage: allow main memory
block to be placed anywherein cache.
,-- Disadvantages: Expensive (requires special hardware);
Requires searching; Limited cache size
Assume the following code:
section .text
mov rdx, 1
mov rax, 8
mov rsi, 2
section .data
myvar: dq 100
Provide the value stored in the register after the following
instructions are executed:
1. DIV rsi
-- value of rsi?
-- value of rax?
-- value of rdx?
2. MOV rdx, 0
,DIV rsi
-- value of rsi?
-- value of rdx?
-- value of rax? - ✔✔1. Rsi = 2, rax = (2^64 + 8)/2, rdx = 0
2. Rsi = 2 rax = 4, rdx = 0
Assume the following code:
section .text
mov rdx, 2
mov rax, 3
mov rsi, 4
section .data
myvar: dq 100
Provide the value stored in the register after the following
instructions are executed:
1. MUL rsi
-- value of rsi?
, -- value of rax?
-- value of rdx?
2. MUL 45
-- value of rdx?
-- value of rax? - ✔✔1. Rsi = 4, rax = 12, rdx = 2
2. Rdx = 2, rax = 135
Assume the following code:
section .text
mov rdx, 20
mov rax, 30
mov rsi, 10
section .data
myvar: dq 100
Given the following instruction:
ADD rax, rdx
-- What is the value of rdx?
