AQA A-LEVEL COMPUTER SCIENCE: COMPUTER
ARCHITECTURE ACTUAL EXAM | QUESTIONS AND ANSWERS |
VERIFIED ANSWERS (100% CORRECT) | LATEST EXAM UPDATE
Define subsystem (3 marks)
The architecture of a computer system consists of subsystems (1). These are
independent (1), and either internal or external (1).
State the 4 internal subsystems/components of the computer
- Central processing unit (CPU)
- Main memory (RAM)
- I/O Controllers (Input/Output)
- The system bus
State 3 examples of external subsystems/components
- A keyboard
- A computer monitor
- A printer
- A magnetic hard drive
State what external subsystems/components are also known as
Peripherals or peripheral devices
Define peripheral (3 marks)
An external hardware device (1) that is connected to the computer system
(1) but not under the direct control of the processor (1).
The memory buffer register connects to the ... bus
Fill in the blank (1 mark)
The memory buffer register connects to the data bus
State 3 reasons why peripheral devices are not connected directly to the
CPU
- Each peripheral operates in a different way
- It is not sensible to design a processor to control every possible peripheral
- A new type of peripheral would require the processor to be redesigned
- Peripherals may operate at a different voltage from the processor
- Peripherals will usually operate at a slower rate than the processor, requiring
buffering
,Draw a simplified diagram of the Von Neumann architecture, including:
- The CPU
- Main memory
- The buses
- A keyboard
- A keyboard input controller
- A visual display unit (VDU)
- A VDU Controller
- Secondary storage
- A (disk) I/O Controller
3 marks
1 mark for correct bus connections (connecting directly between cpu and
controllers ONLY)
1 mark for connecting the keyboard and the VDU to their respective
controllers ONLY
1 mark for not drawing any connections other connections than those
specified in the first and second marking points
Describe what main memory consists of (3 marks)
Contiguous blocks of read/write (1), randomly accesible (1) storage
locations (1)
Describe the role of main memory in the execution of computer programs
(2 marks)
Any two of:
- Main memory stores the instructions to be executed (and any data
required by those instructions)
- Main memory returns the instructions / data / value stored in a memory
location (specified on the address bus) (using the data bus)
- Program is transferred from secondary storage into main memory (if
program not already in main memory) when program execution is
requested
- Main memory stores any value / data resulting from the execution of the
program;
Define word (3 marks)
A fixed size (1) group of bits (1), used by a processor as its natural unit of
data (1)
Define word length (1 mark)
,The size of a word in bits
State what main memory is a store for
Words
The size of a word in main memory is fixed. True/False?
True
State how a particular location/word in RAM is located
With a unique integer address
Define volatile (1 mark)
When power is removed, the data is lost.
Give an example of a volatile data store
Main memory
Explain why main memory is often called random access memory (2
marks)
Storage location may be visited one after another in any order (1) and the
time taken to access any particular storage location is constant (1)
Define system bus (2 marks)
This bus connects together the processor, main memory and I/O
Controllers. (1)
It consists of three dedicated buses:
- The data bus
- The address bus
- The control bus
The second mark is awarded for correctly naming the three busses and only
those buses
Define parallel bus (3 marks)
A set of multiple parallel wires (1) connecting two or more independent
components of a computer (1) that carries a data word OR that can
transmit multiple bits a time (per wire) (1)
Define serial bus (3 marks)
, A single wire (1) connecting two or more independent components of a
computer (1) that transmits one bit at a time (1)
State how many components can transmit on a bus at a time
Only 1
Define bus width (1 mark)
The number of wires in a bus
Draw a diagram showing how the three main busses interact with:
- A keyboard controller
- The processor (CPU)
- Main memory (RAM)
- A visual display controller (VDU)
- A magnetic disk controller
1 mark for correct control bus connections (i.e. bidirectional for each
component)
1 mark for correct address bus connections (i.e. ONLY unidirectional,
unidirection from the CPU to the address bus and unidirectional from the
address bus to other components)
1 mark for correct data bus connections (i.e. unidirectional from the
keyboard controller to the data bus, unidirectional from the data bus to the
visual display controller, bidirectional for all other components)
Bob's computer has a data bus width of 16 bits, and an instruction size of
32 bits.
Explain why the data bus' width is detrimental to system performance (3
marks)
The processor must access main memory twice (1) during every clock cycle
(1), instead of only once if the data bus had a width ≥ 32 bits (1)
With reference to buses, state 1 general way to improve system
performance
By increasing the width of the buses
State a key factor in determining overall system performance
The width of the data bus
Define data bus (3 marks)
ARCHITECTURE ACTUAL EXAM | QUESTIONS AND ANSWERS |
VERIFIED ANSWERS (100% CORRECT) | LATEST EXAM UPDATE
Define subsystem (3 marks)
The architecture of a computer system consists of subsystems (1). These are
independent (1), and either internal or external (1).
State the 4 internal subsystems/components of the computer
- Central processing unit (CPU)
- Main memory (RAM)
- I/O Controllers (Input/Output)
- The system bus
State 3 examples of external subsystems/components
- A keyboard
- A computer monitor
- A printer
- A magnetic hard drive
State what external subsystems/components are also known as
Peripherals or peripheral devices
Define peripheral (3 marks)
An external hardware device (1) that is connected to the computer system
(1) but not under the direct control of the processor (1).
The memory buffer register connects to the ... bus
Fill in the blank (1 mark)
The memory buffer register connects to the data bus
State 3 reasons why peripheral devices are not connected directly to the
CPU
- Each peripheral operates in a different way
- It is not sensible to design a processor to control every possible peripheral
- A new type of peripheral would require the processor to be redesigned
- Peripherals may operate at a different voltage from the processor
- Peripherals will usually operate at a slower rate than the processor, requiring
buffering
,Draw a simplified diagram of the Von Neumann architecture, including:
- The CPU
- Main memory
- The buses
- A keyboard
- A keyboard input controller
- A visual display unit (VDU)
- A VDU Controller
- Secondary storage
- A (disk) I/O Controller
3 marks
1 mark for correct bus connections (connecting directly between cpu and
controllers ONLY)
1 mark for connecting the keyboard and the VDU to their respective
controllers ONLY
1 mark for not drawing any connections other connections than those
specified in the first and second marking points
Describe what main memory consists of (3 marks)
Contiguous blocks of read/write (1), randomly accesible (1) storage
locations (1)
Describe the role of main memory in the execution of computer programs
(2 marks)
Any two of:
- Main memory stores the instructions to be executed (and any data
required by those instructions)
- Main memory returns the instructions / data / value stored in a memory
location (specified on the address bus) (using the data bus)
- Program is transferred from secondary storage into main memory (if
program not already in main memory) when program execution is
requested
- Main memory stores any value / data resulting from the execution of the
program;
Define word (3 marks)
A fixed size (1) group of bits (1), used by a processor as its natural unit of
data (1)
Define word length (1 mark)
,The size of a word in bits
State what main memory is a store for
Words
The size of a word in main memory is fixed. True/False?
True
State how a particular location/word in RAM is located
With a unique integer address
Define volatile (1 mark)
When power is removed, the data is lost.
Give an example of a volatile data store
Main memory
Explain why main memory is often called random access memory (2
marks)
Storage location may be visited one after another in any order (1) and the
time taken to access any particular storage location is constant (1)
Define system bus (2 marks)
This bus connects together the processor, main memory and I/O
Controllers. (1)
It consists of three dedicated buses:
- The data bus
- The address bus
- The control bus
The second mark is awarded for correctly naming the three busses and only
those buses
Define parallel bus (3 marks)
A set of multiple parallel wires (1) connecting two or more independent
components of a computer (1) that carries a data word OR that can
transmit multiple bits a time (per wire) (1)
Define serial bus (3 marks)
, A single wire (1) connecting two or more independent components of a
computer (1) that transmits one bit at a time (1)
State how many components can transmit on a bus at a time
Only 1
Define bus width (1 mark)
The number of wires in a bus
Draw a diagram showing how the three main busses interact with:
- A keyboard controller
- The processor (CPU)
- Main memory (RAM)
- A visual display controller (VDU)
- A magnetic disk controller
1 mark for correct control bus connections (i.e. bidirectional for each
component)
1 mark for correct address bus connections (i.e. ONLY unidirectional,
unidirection from the CPU to the address bus and unidirectional from the
address bus to other components)
1 mark for correct data bus connections (i.e. unidirectional from the
keyboard controller to the data bus, unidirectional from the data bus to the
visual display controller, bidirectional for all other components)
Bob's computer has a data bus width of 16 bits, and an instruction size of
32 bits.
Explain why the data bus' width is detrimental to system performance (3
marks)
The processor must access main memory twice (1) during every clock cycle
(1), instead of only once if the data bus had a width ≥ 32 bits (1)
With reference to buses, state 1 general way to improve system
performance
By increasing the width of the buses
State a key factor in determining overall system performance
The width of the data bus
Define data bus (3 marks)
