(AQA A Level Computer Science) SLR 17
-> Fetch Decode Execute Cycle Exam
With 100% Correct Answers
Describe each stage of the Fetch part of the FDE cycle when fetching an instruction. - correct
answers ✔✔The PC points to the memory address of the instruction; the address is copied to
MAR; the address is sent to RAM through the address bus; the CU sends a control signal
(memory read) through the control bus; the memory controller receives the signal; the
instruction is sent to the MDR through the data bus; the instruction is copied to the CIR; the PC
is incremented.
What does the memory controller need for the instruction to be sent to the MDR? - correct
answers ✔✔A control signal from the CU.
What is the data sent to the MDR through? - correct answers ✔✔The data bus.
What can the data bus carry? - correct answers ✔✔Instructions and data.
Which register are fetched instructions copied to? - correct answers ✔✔The CIR.
Which registers are involved in the Fetch stage of the FDE cycle? - correct answers ✔✔The PC,
the MAR, the MDR and the CIR/ACC (depending on what is being fetched).
Where is the address in the PC first copied to? - correct answers ✔✔The MAR.
What does the MDR do? - correct answers ✔✔It holds fetched data/instructions or data that is
about to be sent to RAM.
-> Fetch Decode Execute Cycle Exam
With 100% Correct Answers
Describe each stage of the Fetch part of the FDE cycle when fetching an instruction. - correct
answers ✔✔The PC points to the memory address of the instruction; the address is copied to
MAR; the address is sent to RAM through the address bus; the CU sends a control signal
(memory read) through the control bus; the memory controller receives the signal; the
instruction is sent to the MDR through the data bus; the instruction is copied to the CIR; the PC
is incremented.
What does the memory controller need for the instruction to be sent to the MDR? - correct
answers ✔✔A control signal from the CU.
What is the data sent to the MDR through? - correct answers ✔✔The data bus.
What can the data bus carry? - correct answers ✔✔Instructions and data.
Which register are fetched instructions copied to? - correct answers ✔✔The CIR.
Which registers are involved in the Fetch stage of the FDE cycle? - correct answers ✔✔The PC,
the MAR, the MDR and the CIR/ACC (depending on what is being fetched).
Where is the address in the PC first copied to? - correct answers ✔✔The MAR.
What does the MDR do? - correct answers ✔✔It holds fetched data/instructions or data that is
about to be sent to RAM.
