Test of VLSI 2 UPDATED ACTUAL Exam
Questions and CORRECT Answers
Defect - CORRECT ANSWER - unintended difference between the implemented
hardware
and its intended design
- hardware, physical level
error - CORRECT ANSWER - wrong output signal produced by a defective system
fault - CORRECT ANSWER - representation of a defect at the abstracted function level
fault model - CORRECT ANSWER - a collection of identical electrical behaviors caused
by various defects are gathered into a model that is used for
simulation of large systems
single stuck at fault - CORRECT ANSWER - Single stuck-at-'value' (value=0, or
value=1), represents a single
line which is permanently tied to 0 or 1, i.e. GND or VDD
- most commonly applied fault model
- two possible faults may occur on a line, namely stuck-at-0 and stuck-
at-1
- representations:
• s-a-0, s-a-1
• a0, a1 line a s-a-0, s-a-1 respectively
• SA0, SA1
• Properties of single stuck-at fault
- Only one line is faulty
, - The logic state of a primary input, primary output or internal gate input
or output is permanently stuck to logic 1 or logic 0
number of fault sites - CORRECT ANSWER - #PI + #gates + # (fanout branches)
controlling value - CORRECT ANSWER - some values which are present at one gate
input determine on their own the output value
sensitized path - CORRECT ANSWER - some values which are present at one gate input,
let thevalue of the other input, propagate to the output; if a fault is present
Fault detection requires: - CORRECT ANSWER - - a test t that activates fault f
- the error that has been activated must propagate to an observation point, a
primary output or a latch where it is memorized
in order to propagate to an observation point, all off-path gate inputs must be
set to non-controlling values
Fault equivalence - CORRECT ANSWER - Two faults f1 and f2 are equivalent if all tests
that
detect f1 also detect f2
equivalence rule AND - CORRECT ANSWER - a=0 b=0 z=0
equivalence rule NAND - CORRECT ANSWER - a=0 b=0 z=1
equivalence rule OR - CORRECT ANSWER - a=1 b=1 z=1
equivalence rule NOR - CORRECT ANSWER - a=1 b=1 z=0
Questions and CORRECT Answers
Defect - CORRECT ANSWER - unintended difference between the implemented
hardware
and its intended design
- hardware, physical level
error - CORRECT ANSWER - wrong output signal produced by a defective system
fault - CORRECT ANSWER - representation of a defect at the abstracted function level
fault model - CORRECT ANSWER - a collection of identical electrical behaviors caused
by various defects are gathered into a model that is used for
simulation of large systems
single stuck at fault - CORRECT ANSWER - Single stuck-at-'value' (value=0, or
value=1), represents a single
line which is permanently tied to 0 or 1, i.e. GND or VDD
- most commonly applied fault model
- two possible faults may occur on a line, namely stuck-at-0 and stuck-
at-1
- representations:
• s-a-0, s-a-1
• a0, a1 line a s-a-0, s-a-1 respectively
• SA0, SA1
• Properties of single stuck-at fault
- Only one line is faulty
, - The logic state of a primary input, primary output or internal gate input
or output is permanently stuck to logic 1 or logic 0
number of fault sites - CORRECT ANSWER - #PI + #gates + # (fanout branches)
controlling value - CORRECT ANSWER - some values which are present at one gate
input determine on their own the output value
sensitized path - CORRECT ANSWER - some values which are present at one gate input,
let thevalue of the other input, propagate to the output; if a fault is present
Fault detection requires: - CORRECT ANSWER - - a test t that activates fault f
- the error that has been activated must propagate to an observation point, a
primary output or a latch where it is memorized
in order to propagate to an observation point, all off-path gate inputs must be
set to non-controlling values
Fault equivalence - CORRECT ANSWER - Two faults f1 and f2 are equivalent if all tests
that
detect f1 also detect f2
equivalence rule AND - CORRECT ANSWER - a=0 b=0 z=0
equivalence rule NAND - CORRECT ANSWER - a=0 b=0 z=1
equivalence rule OR - CORRECT ANSWER - a=1 b=1 z=1
equivalence rule NOR - CORRECT ANSWER - a=1 b=1 z=0
