Questions and CORRECT Answers
SSI - CORRECT ANSWER - 10 gates , 60s , gates and op amps
MSI - CORRECT ANSWER - 100-1000 gates , 70s , filters
LSI - CORRECT ANSWER - 1000-10,000, 80s, microprocessors and A-D
VLSI - CORRECT ANSWER - 10,000-100,000 gates ,90's
Memory, DSP
ULSI - CORRECT ANSWER - 10,00,000-1,00,00,000 gates (~ 1million -10 million gates)
Moore's Law - CORRECT ANSWER - The number of transistors per square inch on an
integrated chip doubles every 18 months
CMOS FINFET - CORRECT ANSWER - upto 22nm , 14nm
VLSI Design flow - CORRECT ANSWER - behavioural-
system specification
arch design
logic level-
functional and logic design
circuit representation-
circuit design
physical design
layout representation-
, physical verf and sign off
fabrication
package and testing
chip
physical ic - CORRECT ANSWER - partitioning
chip planing
placement
clock tree synthesis
signal routing
timing closure
behavioural design - CORRECT ANSWER - flow graph , pseudo code
Specify the functionality of the chip
data path design - CORRECT ANSWER - bus register structure
gate design - CORRECT ANSWER - netlist, gate f-f net list
Generate a netlist of register transfer level components
physical design - CORRECT ANSWER - transistor layout
logic design - CORRECT ANSWER - Generate a netlist of gates/flip-flops or standard
cells
design flow - CORRECT ANSWER - It is a standardized design procedure which involves
multiple stages and helps to achieve actual implementation of idea.