VLSI Exam 1 UPDATED ACTUAL Exam Questions and CORRECT Answers

VLSI Exam 1 UPDATED ACTUAL Exam
Questions and CORRECT Answers
What is the impact of reducing Vdd of a CMOS inverter? - CORRECT ANSWER - 1.
Reduces noise margin
2. Reduces drain current which will drop propagation delay
3. Rise and fall time of output increases


What are the attributes of the subthreshold current in MOSFET? - CORRECT ANSWER -
1. Subthreshold current increases with increase in temp
2. DIBL (Drain Induced Barrier Lowering) reduces the barrier thus subthreshold current
increases with increased DIBL
3. Subthreshold current increases with width of MOSFET


What are the attributes for DC Gain (g) of a CMOS inverter? - CORRECT ANSWER - 1.
Gain will always be negative!
2. The magnitude of gain must be greater than 1 in the transition region
3. The magnitude of |g| < 1 away from the transition region


What is a T-1 network? - CORRECT ANSWER - rL/2 CL rL/2 T



What will a +Vbs do to a PMOS - CORRECT ANSWER - Vth will decrease, PMOS
becomes stronger


What will a -Vbs do to a PMOS - CORRECT ANSWER - Vth will increase, PMOS
becomes weaker, less current flow


What will a +Vbs do to a NMOS - CORRECT ANSWER - Vth increases, NMOS becomes
weaker