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EECS 140 QUIZ REVIEW QUESTIONS WITH ANSWERS

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EECS 140 QUIZ REVIEW QUESTIONS WITH ANSWERS

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EECS 140 QUIZ REVIEW QUESTIONS WITH
ANSWERS


nmos open - ans-x=1 xz xz xzxz




nmos closed - ans-x=0
xz xz xzxz




From the list below fill in the steps for converting an AND-
xz xz xz xz xz xz xz xz xz xz xz




OR circuit to one with all NAND gates:
xz xz xz xz xz xz xz




Step 1: xz




Step 2: xz




Step 3: xz




Step 4: xz




A. Use DeMorgan's theorem to convert AND gates to NOR gates.
xz xz xz xz xz xz xz xz xz xz




B. Use DeMorgan's theorem to convert OR gates to NAND gates.
xz xz xz xz xz xz xz xz xz xz




C. Use double inversion to invert inputs of AND gates
xz xz xz xz xz xz xz xz xz




D. Use double inversion to invert inputs of OR gates
xz xz xz xz xz xz xz xz xz




E. Use double inversion to invert outputs of AND gates
xz xz xz xz xz xz xz xz xz




F. Use double inversion to invert outputs of OR gates
xz xz xz xz xz xz xz xz xz




G. Use NAND gates to realize necessary inversions.
xz xz xz xz xz xz xz




H. Use NOR gates to realize necessary inversions. - ans-E, D, B, G
xz xz xz xz xz xz xz xz xzxz xz xz xz




From the list below fill in the steps for converting an AND-
xz xz xz xz xz xz xz xz xz xz xz




OR circuit to one with all NOR gates:
xz xz xz xz xz xz xz




Step 1: xz




Step 2: xz




Step 3: xz




Step 4: xz




A. Use DeMorgan's theorem to convert AND gates to NOR gates.
xz xz xz xz xz xz xz xz xz xz




B. Use DeMorgan's theorem to convert OR gates to NAND gates.
xz xz xz xz xz xz xz xz xz xz




C. Use double inversion to invert inputs of AND gates
xz xz xz xz xz xz xz xz xz




D. Use double inversion to invert inputs of OR gates
xz xz xz xz xz xz xz xz xz




E. Use double inversion to invert outputs of AND gates
xz xz xz xz xz xz xz xz xz




F. Use double inversion to invert outputs of OR gates
xz xz xz xz xz xz xz xz xz




G. Use NAND gates to realize necessary inversions.
xz xz xz xz xz xz xz




H. Use NOR gates to realize necessary inversions. - ans-F, C, A, H
xz xz xz xz xz xz xz xz xzxz xz xz xz




What is the binary number 1110 in decimal? - ans-14
xz xz xz xz xz xz xz xz xzxz




What is the binary number 101 in decimal? - ans-5
xz xz xz xz xz xz xz xz xzxz




What is the decimal number 10 in unsigned binary? - ans-1010
xz xz xz xz xz xz xz xz xz xzxz

,What is the decimal number 15 in binary? - ans-1111
xz xz xz xz xz xz xz xz xzxz




What is the binary number 1011 in decimal? - ans-11
xz xz xz xz xz xz xz xz xzxz




What is binary 1101 in hexadecimal? - ans-d
xz xz xz xz xz xz xzxz




What is hexadecimal AA in binary? - ans-10101010
xz xz xz xz xz xz xzxz




What is octal 16 in binary? - ans-1110
xz xz xz xz xz xz xzxz




What is hexadecimal 1F in binary? - ans-11111
xz xz xz xz xz xz xzxz




What is binary 1101 in octal? - ans-15
xz xz xz xz xz xz xzxz




What is the carry function or c(x,y) for a half-adder (HA)?
xz xz xz xz xz xz xz xz xz xz




|+| = XOR
xz xz




c_in = carry-in xz xz




c_out = carry-out - ans-xy xz xz xz xzxz




A 3-bit full-adder is used add the binary numbers 101 and 101.
xz xz xz xz xz xz xz xz xz xz xz




The 3-bit sum from the full-adder is:
xz xz xz xz xz xz xz




The carry-out from the full-adder is: - ans-010, 1
xz xz xz xz xz xz xzxz xz




What is the sum function or s(x,y) for a half-adder (HA)?
xz xz xz xz xz xz xz xz xz xz




|+| = XOR
xz xz




c_in = carry-in xz xz




c_out = carry-out - ans-x[+]y xz xz xz xzxz




What is the sum function or s(x,y,c_in) for a full-adder (FA)?
xz xz xz xz xz xz xz xz xz xz




|+| = XOR
xz xz




c_in = carry-in xz xz




c_out = carry-out - ans-x[+]y{+}c_in
xz xz xz xzxz




What is the carry-out function or c(x,y,c_in) for a full-adder (FA)?
xz xz xz xz xz xz xz xz xz xz




|+| = XOR
xz xz




c_in = carry-in xz xz




c_out = carry-out - ans-xy+xc_in+yc_in
xz xz xz xzxz




If the propagation delay through a full-
xz xz xz xz xz xz




adder (FA) is 150 nsec, what is the total propagation delay in nsec of an 8-bit adder? - ans-
xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xzxz




1200

Given:
X = 1101 where X is represented by the bits x3, x2, x1, and x0, with x3 being the most signifi
xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz




cant bit and x0 being the least significant bit.
xz xz xz xz xz xz xz xz

,Y = 1001 where Y is represented by the bits y3, y2, y1, and y0, with y3 being the most signifi
xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz




cant bit and y0 being the least significant bit.
xz xz xz xz xz xz xz xz




4-bit ripple-carry adder with c0 set to 0.
xz xz xz xz xz xz xz




If we add X and Y with the ripple-carry adder, what are the output values of: - ans-
xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xzxz




c4= 1, s3=0, s2=1, s1=1, s0=0
xz xz xz xz xz




What is the 12- xz xz xz




bit 2's complement representation of these decimal numbers (enter the answer with no spa
xz xz xz xz xz xz xz xz xz xz xz xz xz




ces)?
-95
-1630
73
1906 - ans-111110100001 xz xzxz




100110100010
000001001001
011101110010

What is the decimal value of the following 2's complement numbers:
xz xz xz xz xz xz xz xz xz xz




10 1110 0111xz xz




01 1101 1110xz xz




11 1111 1110 - ans--281
xz xz xz xzxz




478
-2

Add these 12-bit 2's complement numbers. Give your answer as signed decimal numbers:
xz xz xz xz xz xz xz xz xz xz xz xz




00110110 + 01000101 = xz xz xz




01110101 + 11011110 = xz xz xz




11011111 + 10111000 = - ans-123 xz xz xz xz xzxz




83
-105

Convert these numbers to 4-bit 2's complement and add them. Give your answer as 4-
xz xz xz xz xz xz xz xz xz xz xz xz xz xz




bit 2's complement numbers:
xz xz xz




5+2=
xz xz xz




5 + (-2) =
xz xz xz




-5 + 2 =
xz xz xz




-5 + (-2) = - ans-0111
xz xz xz xz xzxz




0011
1101
1001

Add these 12-bit 2's complement numbers. Give your answer as signed decimal numbers:
xz xz xz xz xz xz xz xz xz xz xz xz




00110110 - 00101011 = xz xz xz




11010011 - 11101100 = - ans-11 xz xz xz xz xzxz




-25

, Convert these numbers to 4-bit 2's complement and add them. Give your answer as 4-
xz xz xz xz xz xz xz xz xz xz xz xz xz xz




bit 2's complement numbers:
xz xz xz




5-2=
xz xz xz




-5 - 2 =
xz xz xz




5 - (-2) =
xz xz xz




-5 - (-2) = - ans-0011
xz xz xz xz xzxz




1001
0111
1101

Let X = 5 and Y = -2
xz xz xz xz xz xz xz




Give the inputs and outputs of a 4-bit adder/
xz xz xz xz xz xz xz xz




subtractor unit as depicted in Figure 5.13 (Module 40 - Slide 4), to calculate X - Y.
xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz




x3 = ; x2 = ; x1 = ; x0 =
xz xz xz xz xz xz xz xz xz xz




y3 = ; y2 = ; y1 = ; y0 =
xz xz xz xz xz xz xz xz xz xz




!Add/Sub =, xz




s3 = ; s2 = ; s1 = ; s0 =
xz xz xz xz xz xz xz xz xz xz




cn = - ans-x3 = 0; x2 = 1; x1 = 0; x0 =1
xz xz xzxz xz xz xz xz xz xz xz xz xz xz




y3 =1 ; y2 = 1; y1 = 1; y0 =0
xz xz xz xz xz xz xz xz xz xz




!Add/Sub =,1 xz




s3 =0 ; s2 = 1; s1 = 1; s0 =1
xz xz xz xz xz xz xz xz xz xz




cn =0 xz




Let X = 5 and Y = -2
xz xz xz xz xz xz xz




Give the inputs and outputs of a 4-bit adder/
xz xz xz xz xz xz xz xz




subtractor unit as depicted in Figure 5.13 (Module 40 - Slide 4), to calculate X + Y. - ans-
xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xzxz




x3 = 0; x2 =1 ; x1 =0 ; x0 =1
xz xz xz xz xz xz xz xz xz xz




y3 =1 ; y2 =1 ; y1 =1 ; y0 =0
xz xz xz xz xz xz xz xz xz xz




!Add/Sub =0 xz




s3 =0 ; s2 = 0; s1 = 1; s0 =1
xz xz xz xz xz xz xz xz xz xz




cn =1 xz




Let X = 7 and Y = 2. Suppose we want to add X + Y using 2s complement arithmetic.
xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz xz




Give the inputs and outputs of a 4-bit adder/
xz xz xz xz xz xz xz xz




subtractor unit that detects overflow as depicted below: xz xz xz xz xz xz xz




x3 = ; x2 = ; x1 = ; x0 =
xz xz xz xz xz xz xz xz xz xz




y3 = ; y2 = ; y1 = ; y0 =
xz xz xz xz xz xz xz xz xz xz




!Add/Sub = xz




s3 = ; s2 = ; s1 = ; s0 =
xz xz xz xz xz xz xz xz xz xz




cn = xz




Overflow = - ans-x3 =.0 ; x2 = 1; x1 =1 ; x0 =1 xz xz xzxz xz xz xz xz xz xz xz xz xz xz




y3 = 0; y2 =0 ; y1 =1 ; y0 =0
xz xz xz xz xz xz xz xz xz xz




!Add/Sub =0 xz




s3 =1 ; s2 =0 ; s1 =0 ; s0 =1
xz xz xz xz xz xz xz xz xz xz




cn =0 xz




Overflow =1 xz

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