CEA 201 - CHAPTER 4 EXAM QUESTIONS ANSWERED CORRECTLY LATEST UPDATE 2026
1. __________ refers to whether memory is internal or external to the computer.
a. Location
b. Access
c. Hierarchy
d. Tag - Answers Answer: a. Location
2. Internal memory capacity is typically expressed in terms of _________.
a. hertz
b. nanos
c. bytes
d. LOR - Answers Answer: c. bytes
3. For internal memory, the __________ is equal to the number of electrical lines into and out of the
memory module.
a. Access time
b. Unit of transfer
c. Capacity
d. Memory ratio - Answers Answer: b. Unit of transfer
4. "Memory is organized into records and access must be made in a specific linear sequence" is a
description of __________.
a. Sequential access
b. Direct access
c. Random access
d. Associative - Answers Answer: a. Sequential access
5. individual blocks or records have a unique address based on physical location with __________.
a. Associative
b. Physical access
c. Direct access
d. Sequential access - Answers Answer: c. Direct access
6. The ________ consists of the access time plus any additional time required before a second access
can commence.
a. Latency
b. Memory cycle time
c. Direct access
d. Transfer rate - Answers Answer: b. Memory cycle time
7. A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk is
referred to as a _________.
a. Disk cache
b. Latency
c. Virtual address
d. Miss - Answers Answer: a. Disk cache
8. Which cache replacement policy replaces the least recently used cache block when a new block
needs to be loaded?
a. First-In, First-Out (FIFO)
b. Least Recently Used (LRU)
c. Random Replacement
d. Most Recently Used (MRU) - Answers b. Least Recently Used (LRU)
9. Which cache mapping technique allows a memory block to be mapped to any cache line, improving
flexibility but requiring complex search logic?
a. Direct-mapped
b. Fully-associative
c. Set-associative
d. Random-associative - Answers c. Combines direct-mapped and fully-associative mapping,
balancing performance and complexity
10. Which of the following best describes Set-Associative mapping in cache design?
a. Maps each memory block to only one cache line.
b. Allows any memory block to be loaded into any cache line, but checks all tags for a match.
1. __________ refers to whether memory is internal or external to the computer.
a. Location
b. Access
c. Hierarchy
d. Tag - Answers Answer: a. Location
2. Internal memory capacity is typically expressed in terms of _________.
a. hertz
b. nanos
c. bytes
d. LOR - Answers Answer: c. bytes
3. For internal memory, the __________ is equal to the number of electrical lines into and out of the
memory module.
a. Access time
b. Unit of transfer
c. Capacity
d. Memory ratio - Answers Answer: b. Unit of transfer
4. "Memory is organized into records and access must be made in a specific linear sequence" is a
description of __________.
a. Sequential access
b. Direct access
c. Random access
d. Associative - Answers Answer: a. Sequential access
5. individual blocks or records have a unique address based on physical location with __________.
a. Associative
b. Physical access
c. Direct access
d. Sequential access - Answers Answer: c. Direct access
6. The ________ consists of the access time plus any additional time required before a second access
can commence.
a. Latency
b. Memory cycle time
c. Direct access
d. Transfer rate - Answers Answer: b. Memory cycle time
7. A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk is
referred to as a _________.
a. Disk cache
b. Latency
c. Virtual address
d. Miss - Answers Answer: a. Disk cache
8. Which cache replacement policy replaces the least recently used cache block when a new block
needs to be loaded?
a. First-In, First-Out (FIFO)
b. Least Recently Used (LRU)
c. Random Replacement
d. Most Recently Used (MRU) - Answers b. Least Recently Used (LRU)
9. Which cache mapping technique allows a memory block to be mapped to any cache line, improving
flexibility but requiring complex search logic?
a. Direct-mapped
b. Fully-associative
c. Set-associative
d. Random-associative - Answers c. Combines direct-mapped and fully-associative mapping,
balancing performance and complexity
10. Which of the following best describes Set-Associative mapping in cache design?
a. Maps each memory block to only one cache line.
b. Allows any memory block to be loaded into any cache line, but checks all tags for a match.
