CPEN Practice Exam TEST MOD 015 with Actual Questions &
Answers 2023/2024 VERIFIED
Hit Ratio (Success Ratio) correct answers hits / (hits + misses)
Tag correct answers the portion of a memory address that determines whether a cache line contains the
needed information
key register correct answers in associative memory, this selects the bit positions where matching is
significant
segment fault correct answers this occurs when a program makes reference to a logical segment of
memory that is not physically present in main memory
write-through correct answers a policy whereby writes to cached locations update main memory at the
same time
Transistor correct answers this technological development was an important factor in moving from "first-
generation" to "second-generation" computers
VLSI correct answers this technological development was an important factor in moving from the "third-
generation" to "fourth-generation" computers
Harvard Architecture correct answers a type of computer system design in which the CPU uses separate
memory interfaces for accessing instructions and data operands
locality of reference correct answers the principle that allows hierarchical storage systems to function at
close to the speed of the faster, smaller level(s)
compatibility correct answers an architectural attribute that expresses the support provided for "legacy"
or other architectures
integrated circuit correct answers This technological development was an important factor in moving
from "second-generation" to "third-generation" computers
dirty bit correct answers This is set to indicate that the contents of a faster memory subsystem have
been modified and need to be copied to the slower memory when they are displaced.
index correct answers The portion of a memory address that determines in which cache line a given
main memory location's contents may be cached
argument register correct answers A register in an associative memory that contains the item to be
searched for.
MMU correct answers a hardware device that handles the details of address translation in a system with
virtual memory
Answers 2023/2024 VERIFIED
Hit Ratio (Success Ratio) correct answers hits / (hits + misses)
Tag correct answers the portion of a memory address that determines whether a cache line contains the
needed information
key register correct answers in associative memory, this selects the bit positions where matching is
significant
segment fault correct answers this occurs when a program makes reference to a logical segment of
memory that is not physically present in main memory
write-through correct answers a policy whereby writes to cached locations update main memory at the
same time
Transistor correct answers this technological development was an important factor in moving from "first-
generation" to "second-generation" computers
VLSI correct answers this technological development was an important factor in moving from the "third-
generation" to "fourth-generation" computers
Harvard Architecture correct answers a type of computer system design in which the CPU uses separate
memory interfaces for accessing instructions and data operands
locality of reference correct answers the principle that allows hierarchical storage systems to function at
close to the speed of the faster, smaller level(s)
compatibility correct answers an architectural attribute that expresses the support provided for "legacy"
or other architectures
integrated circuit correct answers This technological development was an important factor in moving
from "second-generation" to "third-generation" computers
dirty bit correct answers This is set to indicate that the contents of a faster memory subsystem have
been modified and need to be copied to the slower memory when they are displaced.
index correct answers The portion of a memory address that determines in which cache line a given
main memory location's contents may be cached
argument register correct answers A register in an associative memory that contains the item to be
searched for.
MMU correct answers a hardware device that handles the details of address translation in a system with
virtual memory
