System Architecture
Computer System
Embedded Computers
A small device that contains all the components of a computer e.g. ROM,
RAM, CPU
E.g. Microwave, Washing machine, Satnav, camera etc
Reasons to use Embedded Systems
Physically small, less space is needed
Use less power, cheaper to run
Less power, no overheating
One task in mind, very efficient
Built on a single printed circuit, easy to replace
Data Buses
Data Bus – Carries actual, binary data around computer
Address Bus – Carries address of memory locations used to store data
Control Bus – Sends and receives signals that controls components &
CPU
CPU
The CPU
CPU fetches memory from RAM; Decodes instructions and executes
them
Its purpose is to process data
The Control Unit
Controls way data moves around CPU
Controls and monitors flow of data between CPU and input/output
devices
Executes instructions provided by program
,The ALU
Performs Arithmetic Operations
Logic Operations/ Comparisons
Shift operations
Registers
Type of memory inside CPU
Temporarily holds data while a software’s running
Registers are faster than RAM and Cache
Von Neumann Architecture
Von Neumann Architecture
Both data and software that are currently being used are stored in RAM
With this architecture, a task can be changed by simply loading a
different program into memory
Also known as ‘Stored Program’ computers
Features of a VN Layout
RAM has enough memory for both data and Programs, thus easy to load
a different program
Control Unit handles movement of data and instructions
Info and instructions are carried by buses
ALU responsible for Arithmetic and Logic Operations
Way of inputting and outputting data
MAR and MDR
MAR
o In the RAM, every instruction/data is located in a specific location
o This location has a unique address
o The address of instruction/data being accessed is temporarily
stored in the Memory Address Register
o This address is passed to RAM via Address Bus
, MDR
o For data to be fetched from RAM, the CPU has to temporarily
store it in the Memory Data Register
o Unlike Instructions, only data can travel both ways
o It can be fetched from RAM to be decoded by the CPU
o After processing, it can be sent back to RAM to be temporarily
stored
o All data must pass through MDR via Data bus
More Registers
Program Counter
o Points to instruction currently being executed
o As each instruction’s processed, PC is updated with address of
next instruction to fetch
o PC copies info to MAR and increments
Accumulator
o Temporarily stores ALU’s results
o Makes it simpler to write software that handles data
o Program runs faster, as registers are faster than RAM
Fetch, Decode, Execute Cycle
Fetch, Decode, Execute Cycle
1) Address in PC (305) is copied to MAR
2) Address in MAR is passed onto Address Bus and Control Unit sends a
signal to RAM to read this address
3) Instruction at 305 is sent across Data Bus and copied into MDR, then the
MDR is copied into the Instruction Register. The PC is then incremented
4) Instruction’s decoded by Control Unit so CPU knows what to do and
various parts of the CPU is prepared for the next stage
Computer System
Embedded Computers
A small device that contains all the components of a computer e.g. ROM,
RAM, CPU
E.g. Microwave, Washing machine, Satnav, camera etc
Reasons to use Embedded Systems
Physically small, less space is needed
Use less power, cheaper to run
Less power, no overheating
One task in mind, very efficient
Built on a single printed circuit, easy to replace
Data Buses
Data Bus – Carries actual, binary data around computer
Address Bus – Carries address of memory locations used to store data
Control Bus – Sends and receives signals that controls components &
CPU
CPU
The CPU
CPU fetches memory from RAM; Decodes instructions and executes
them
Its purpose is to process data
The Control Unit
Controls way data moves around CPU
Controls and monitors flow of data between CPU and input/output
devices
Executes instructions provided by program
,The ALU
Performs Arithmetic Operations
Logic Operations/ Comparisons
Shift operations
Registers
Type of memory inside CPU
Temporarily holds data while a software’s running
Registers are faster than RAM and Cache
Von Neumann Architecture
Von Neumann Architecture
Both data and software that are currently being used are stored in RAM
With this architecture, a task can be changed by simply loading a
different program into memory
Also known as ‘Stored Program’ computers
Features of a VN Layout
RAM has enough memory for both data and Programs, thus easy to load
a different program
Control Unit handles movement of data and instructions
Info and instructions are carried by buses
ALU responsible for Arithmetic and Logic Operations
Way of inputting and outputting data
MAR and MDR
MAR
o In the RAM, every instruction/data is located in a specific location
o This location has a unique address
o The address of instruction/data being accessed is temporarily
stored in the Memory Address Register
o This address is passed to RAM via Address Bus
, MDR
o For data to be fetched from RAM, the CPU has to temporarily
store it in the Memory Data Register
o Unlike Instructions, only data can travel both ways
o It can be fetched from RAM to be decoded by the CPU
o After processing, it can be sent back to RAM to be temporarily
stored
o All data must pass through MDR via Data bus
More Registers
Program Counter
o Points to instruction currently being executed
o As each instruction’s processed, PC is updated with address of
next instruction to fetch
o PC copies info to MAR and increments
Accumulator
o Temporarily stores ALU’s results
o Makes it simpler to write software that handles data
o Program runs faster, as registers are faster than RAM
Fetch, Decode, Execute Cycle
Fetch, Decode, Execute Cycle
1) Address in PC (305) is copied to MAR
2) Address in MAR is passed onto Address Bus and Control Unit sends a
signal to RAM to read this address
3) Instruction at 305 is sent across Data Bus and copied into MDR, then the
MDR is copied into the Instruction Register. The PC is then incremented
4) Instruction’s decoded by Control Unit so CPU knows what to do and
various parts of the CPU is prepared for the next stage
