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A student is analyzing a CPU's instruction cycle. Which component is responsible for
storing the memory address of the next instruction to be executed?
a. Current Instruction Register (CIR)
b. Memory Address Register (MAR)
c. Program Counter (PC)
d. Accumulator
✔️ Correct Answer: C
Rationale:
The Program Counter (PC) is a register within the CPU that holds the address of the next
instruction to be fetched and executed. After each instruction is fetched, the PC is
incremented to point to the subsequent instruction in memory, ensuring the correct
sequence of program execution. The Current Instruction Register (Option A) stores the
instruction currently being decoded and executed, not the next instruction's address. The
Memory Address Register (Option B) holds the specific memory location being accessed
for reading or writing, but it does not track the sequential flow of instructions. The
Accumulator (Option D) temporarily stores intermediate arithmetic and logic results
during processing. Understanding the PC's function is fundamental to comprehending
how the CPU manages program flow and processes instructions in the correct order.
,During the execution phase of the CPU cycle, which register contains the instruction that
is currently being processed by the control unit?
a. Memory Data Register (MDR)
b. Current Instruction Register (CIR)
c. Memory Address Register (MAR)
d. Program Counter (PC)
✔️ Correct Answer: B
Rationale:
The Current Instruction Register (CIR) holds the instruction that has been fetched from
memory and is currently being decoded and executed by the CPU's control unit. This
ensures that the correct instruction is processed at each stage of the fetch-decode-
execute cycle. The Memory Data Register (Option A) acts as a buffer, temporarily holding
data being transferred to or from memory; it does not store the instruction being
executed. The Memory Address Register (Option C) contains the memory location being
accessed, not the instruction itself. The Program Counter (Option D) stores the address
of the next instruction to be fetched, not the current instruction being executed. The CIR
is essential for the decode phase, where the instruction is broken down into opcode and
operands for execution.
When the CPU needs to read data from or write data to a specific memory location,
which register is responsible for holding the address of that location?
a. Memory Data Register (MDR)
b. Memory Address Register (MAR)
c. Accumulator
d. Program Counter (PC)
✔️ Correct Answer: B
Rationale:
The Memory Address Register (MAR) holds the address of the memory location that the
CPU needs to access for reading or writing operations. It acts as an interface between the
CPU and memory, specifying which location in RAM or ROM should be addressed. The
Memory Data Register (Option A) holds the actual data being transferred, not the
address. The Accumulator (Option C) temporarily stores intermediate calculation results.
The Program Counter (Option D) holds the address of the next instruction, not the data
address. The MAR is critical for memory access operations; without it, the CPU could not
, locate the correct data or instruction in memory. During read operations, the address is
placed in the MAR, and then the data is transferred to the MDR.
Which component of the CPU serves as a temporary holding area for data that is being
transferred to or from memory?
a. Program Counter (PC)
b. Memory Address Register (MAR)
c. Memory Data Register (MDR)
d. Control Unit
✔️ Correct Answer: C
Rationale:
The Memory Data Register (MDR), also known as the Memory Buffer Register, acts as a
buffer between the CPU and memory, temporarily holding data that is being read from
or written to memory. When the CPU reads from memory, the data is placed in the MDR
before being transferred to other registers or execution units. When writing to memory,
data is placed in the MDR before being written to the specified memory address. The
Program Counter (Option A) stores instruction addresses, not data. The Memory Address
Register (Option B) holds addresses, not data. The Control Unit (Option D) coordinates
operations but does not store data. The MDR's buffering function is essential for
managing the speed difference between the CPU and memory, allowing for efficient data
transfer.
The Arithmetic Logic Unit (ALU) is primarily responsible for which of the following
operations within the CPU?
a. Decoding instructions
b. Performing arithmetic and logical operations
c. Managing memory addressing
d. Sequencing instruction execution
✔️ Correct Answer: B
Rationale:
The Arithmetic Logic Unit (ALU) is the component of the CPU that performs all arithmetic