CISSP SecurityCISSP Security
Architecture andArchitecture
Design study and
guideDesign
Study this set o nline at: https://www.cram.co m/flashcards/cissp-security-architecture-
and-design-849181
Organi zati on of the f undamental el ements compri si ng the computer Mai n
Computer Archi tecture
components CPU – Central Processi ng Uni t Memory I nput / Output devi ces
i s a f ramework f or enterpri se archi tecture, whi ch provi des a f ormal and hi ghl y
Z achman F ramework
structured way of vi ewi ng and def i ni ng an enterpri se
i s a f ramework and methodol ogy f or E nterpri se Securi ty Archi tecture and Servi ce
Management. I t was devel oped i ndependentl y f rom the Z achman F ramework, but SABSA (Sherwood Appl i ed Busi ness Securi ty Archi tecture)
has a si mi l ar structure
OSI second part, about secure communi cati ons, not an i mpl ementati on I SO 7498-2:1989
1
, CISSP SecurityCISSP Security
Architecture andArchitecture
Design study and
guideDesign
Study this set o nline at: https://www.cram.co m/flashcards/cissp-security-architecture-
and-design-849181
systems and sof tware engi neeri ng; practi ce f or archi tectural descri pti on of sotware
I SO/I E C 42010:2007
i ntensi ce systems
i s a ref erence model to organi ze the enterpri se archi tecture (E A) and systems
D epartment of D ef ense Archi tecture F ramework (D oD AF )
archi tecture i nto compl ementary and consi stent vi ews
cpu i s ei ther i dl e because there i s no i nput or i ts wai ti ng f or anothr process to run ready state
cpu i s executi ng runni ng
2
, CISSP SecurityCISSP Security
Architecture andArchitecture
Design study and
guideDesign
Study this set o nline at: https://www.cram.co m/flashcards/cissp-security-architecture-
and-design-849181
unabl e to run unti l an external event occurs, wai ti ng f or i nput bl ocked
i s a hardware i nterrupt that may be i gnored by setti ng a bi t i n an i nterrupt mask
masked/i nerruptabl e
regi ster's (I MR) bi t-mask
i s a devi ce that modul ates an anal og carri er si gnal to encode di gi tal i nf ormati on,
Modem
and al so demodul ates such a carri er si gnal to decode the transmi tted i nf ormati on
i s a computer hardware component desi gned to al l ow computers to communi cate
network i nterf ace control l er (NI C)
over a computer network
3
Architecture andArchitecture
Design study and
guideDesign
Study this set o nline at: https://www.cram.co m/flashcards/cissp-security-architecture-
and-design-849181
Organi zati on of the f undamental el ements compri si ng the computer Mai n
Computer Archi tecture
components CPU – Central Processi ng Uni t Memory I nput / Output devi ces
i s a f ramework f or enterpri se archi tecture, whi ch provi des a f ormal and hi ghl y
Z achman F ramework
structured way of vi ewi ng and def i ni ng an enterpri se
i s a f ramework and methodol ogy f or E nterpri se Securi ty Archi tecture and Servi ce
Management. I t was devel oped i ndependentl y f rom the Z achman F ramework, but SABSA (Sherwood Appl i ed Busi ness Securi ty Archi tecture)
has a si mi l ar structure
OSI second part, about secure communi cati ons, not an i mpl ementati on I SO 7498-2:1989
1
, CISSP SecurityCISSP Security
Architecture andArchitecture
Design study and
guideDesign
Study this set o nline at: https://www.cram.co m/flashcards/cissp-security-architecture-
and-design-849181
systems and sof tware engi neeri ng; practi ce f or archi tectural descri pti on of sotware
I SO/I E C 42010:2007
i ntensi ce systems
i s a ref erence model to organi ze the enterpri se archi tecture (E A) and systems
D epartment of D ef ense Archi tecture F ramework (D oD AF )
archi tecture i nto compl ementary and consi stent vi ews
cpu i s ei ther i dl e because there i s no i nput or i ts wai ti ng f or anothr process to run ready state
cpu i s executi ng runni ng
2
, CISSP SecurityCISSP Security
Architecture andArchitecture
Design study and
guideDesign
Study this set o nline at: https://www.cram.co m/flashcards/cissp-security-architecture-
and-design-849181
unabl e to run unti l an external event occurs, wai ti ng f or i nput bl ocked
i s a hardware i nterrupt that may be i gnored by setti ng a bi t i n an i nterrupt mask
masked/i nerruptabl e
regi ster's (I MR) bi t-mask
i s a devi ce that modul ates an anal og carri er si gnal to encode di gi tal i nf ormati on,
Modem
and al so demodul ates such a carri er si gnal to decode the transmi tted i nf ormati on
i s a computer hardware component desi gned to al l ow computers to communi cate
network i nterf ace control l er (NI C)
over a computer network
3