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CSE 486 Exam 2 Question and answers correctly solved 2025/2026

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CSE 486 Exam 2 Question and answers correctly solved 2025/2026 (T/F) In Nachos, the address space of threads is implemented in thread.[cc|h] - correct answer False. It is implemented in addresspace.[cc|h] (T/F) The current thread calling currentThread‐Yield() will make the current thread to be in a blocked state. - correct answer False. The current thread goes to the ready queue. (T/F) OS must load at least some part the code segment of a process to the main memory to run it. - correct answer True (T/F) The Memory Management Unit (MMU) is responsible for loading programs to the main memory - correct answer False. MMU translates virtual to physical address. (T/F) An interrupt is generated by the CPU to interrupt the Hard Disk or other I/O devices. - correct answer False. It is the other way around. HD or an I/O device generates interrupts. (T/F) DMA I/O frees up the CPU for computational task the most, among the three I/O methods. - correct answer True (T/F) In a word addressable machine with 8‐bit CPU architecture, the maximum memory size that can be accessed is 2^8 bytes. - correct answer False

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CSE 486 Exam 2 Question and
answers correctly solved 2025/2026
(T/F) In Nachos, the address space of threads is implemented in thread.[cc|h] - correct answer ✔False.
It is implemented in addresspace.[cc|h]



(T/F) The current thread calling currentThread‐>Yield() will make the current thread to be in a blocked
state. - correct answer ✔False. The current thread goes to the ready queue.



(T/F) OS must load at least some part the code segment of a process to the main memory to run it. -
correct answer ✔True



(T/F) The Memory Management Unit (MMU) is responsible for loading programs to the main memory -
correct answer ✔False. MMU translates virtual to physical address.



(T/F) An interrupt is generated by the CPU to interrupt the Hard Disk or other I/O devices. - correct
answer ✔False. It is the other way around. HD or an I/O device generates interrupts.



(T/F) DMA I/O frees up the CPU for computational task the most, among the three I/O methods. -
correct answer ✔True



(T/F) In a word addressable machine with 8‐bit CPU architecture, the maximum memory size that can be
accessed is 2^8 bytes. - correct answer ✔False. It is 2^8 words.



(T/F) Internal fragmentation is caused by fixed partition of memory including Paging. - correct answer
✔True



(T/F) TLB will be more useful if the principle of locality is not observed in program runtime behavior. -
correct answer ✔False

, (T/F) The overlays method is a way to perform synchronization of processes. - correct answer ✔False



(T/F) Pages in a paging system have the same size. - correct answer ✔True



(T/F) Page frames are in the main memory. - correct answer ✔True



(T/F) TLB contains most frequently accessed pages so speed up can be achieved in accessing such pages.
- correct answer ✔False



(T/F) Paging introduces additional memory access. - correct answer ✔True, because accessing page
table.



(T/F) Inverted page table method is used to address the time complexity of the paging system. - correct
answer ✔False



(T/F) There are multiple Inverted page tables for a system. - correct answer ✔False



(T/F) In pure paging with single‐level paging, there is one page table per process. - correct answer
✔True



(T/F) Page fault means that the current process needs a page from the hard disk. - correct answer
✔True



(T/F) After the desired page has been brought in to the main memory, the page table for the current
process must be updated accordingly. - correct answer ✔True

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