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Test Bank – Digital Fundamentals, 11th Edition – Thomas L. Floyd – ISBN 9780132737968 (Chapters 1–15)

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This official Test Bank for Digital Fundamentals, 11th Edition by Thomas L. Floyd, provides a comprehensive assessment suite designed to evaluate a student's mastery of the fundamental concepts of digital electronics and computer systems. The curriculum is meticulously covered across all 15 chapters: Chapter 1: Digital Concepts, Chapter 2: Number Systems, Operations, and Codes, Chapter 3: Logic Gates, Chapter 4: Boolean Algebra and Logic Simplification, Chapter 5: Combinational Logic Analysis, Chapter 6: Functions of Combinational Logic, Chapter 7: Latches, Flip-Flops, and Timers, Chapter 8: Shift Registers, Chapter 9: Counters, Chapter 10: Programmable Logic, Chapter 11: Data Storage, Chapter 12: Signal Conversion and Processing, Chapter 13: Data Transmission, Chapter 14: Data Processing, and Chapter 15: Integrated Circuit Technologies.

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Digital
Fundamentals
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11th Edition
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TEST BANK
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Thomas L. Floyd
────────────────────────────────────────────────────
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Comprehensive Test Bank for Instructors
and Students
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9780132737968


© Thomas L. Floyd. All rights reserved.
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Reproduction or distribution without permission is
prohibited.


© MEDGEEK

, Edrftgyihu
Digital jiuh
Fundamentals — Complete Test Bank

Thomas L. Floyd
ISBN: 9780132737968
ST

Chapter 1: Digital Concepts
Chapter 2: Number Systems, Operations, and Codes
Chapter 3: Logic Gates
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Chapter 4: Boolean Algebra and Logic Simplification
Chapter 5: Combinational Logic Analysis
Chapter 6: Functions of Combinational Logic
Chapter 7: Latches, Flip-Flops, and Timers
IA

Chapter 8: Shift Registers
Chapter 9: Counters
Chapter 10: Programmable Logic
_A

Chapter 11: Data Storage
Chapter 12: Signal Conversion and Processing
Chapter 13: Data Transmission
Chapter 14: Data Processing
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Chapter 15: Integrated Circuit Technologies
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© MEDGEEK

, Chapter 1

Name___________________________________


MULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the
question.
1) Which circuit converts data from serial form to parallel form? 1) _______
A) Multiplexer B) Comparator C) Encoder D) Demultiplexer

2) Which one of the circuits listed is made up of flip-flops? 2) _______
A) A comparator B) A converter C) A register D) A multiplexer
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3) The time from one leading edge on a digital waveform to the next is the waveform ________. 3) _______
A) rise time B) pulse width C) period D) fall time
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Figure 1-1

4) The time between transition 1 and transition 3 in Figure 1-1 is the ________. 4) _______
A) period B) frequency C) amplitude D) pulse width
IA

5) The output from an OR gate is HIGH ________. 5) _______
A) when at least one input is HIGH B) only when all inputs are HIGH
C) only when all inputs are LOW D) none of the above
_A
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Figure 1-3

6) The symbol in Figure 1-3(B) represents the ________ function. 6) _______
A) OR B) NON C) XOR D) AND
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7) On a positive-going pulse, the leading edge is the ________. 7) _______
A) HIGH-to-LOW transition B) falling edge
C) negative-going edge D) positive-going edge

8) Of the circuits listed, the one that is most likely to be found in a CD player is a(n) ________. 8) _______
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A) programmable logic device B) digital-to-analog converter
C) analog-to-digital converter D) SPLD
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Figure 1-1

9) Which edge in Figure 1-1 is the trailing edge? 9) _______
A) 1 B) 2 C) 3 D) Both 1 and 3

, 10) The arrow in the figure below points to pin ________. 10) ______




A) 17 B) 16 C) 5 D) 4
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11) On a negative-going pulse, the leading edge is the ________. 11) ______
A) LOW-to-HIGH transition B) negative-going edge
C) positive-going edge D) rising edge

12) ______
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12) Which circuit converts coded information into a noncoded form?
A) Comparator B) Encoder C) Decoder D) Multiplexer
IA

Figure 1-3

13) The symbol in Figure 1-3(C) represents the ________ function. 13) ______
_A

A) XOR B) NOT C) OR D) AND

14) The approximate duty cycle for the digital waveform below is ________. 14) ______
PP

A) 20% B) 80% C) 30% D) 50%
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Figure 1-4
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15) The package style in Figure 1-4(C) is a(n) ________. 15) ______
A) SOIC B) PLCC C) LCCC D) FP

16) The output from an OR gate is LOW ________. 16) ______
D?

A) only when all inputs are LOW B) whenever any input is HIGH
C) only when all inputs are HIGH D) none of the above

17) The netlist is generated during the ________ phase of the PLD programming process. 17) ______
A) design entry B) compilation C) synthesis D) download

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Thomas L. Floyd Digital Fundamentals
Edition: 2014 ISBN: 9780132737968 Edition: Unknown

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