Solution Manual for Fundamentals of Electric
Drives 2nd Edition El Sharkawi / All Chapters
2 - 11
2nd Edition
,Fundamentals of Electric Drives 2nd Edition El Sharkawi
Solutions Manual
Contents
Chapter 2.......................................................................................................................... 2-1
Chapter 3.......................................................................................................................... 3-1
Chapter 4.......................................................................................................................... 4-1
Chapter 5.......................................................................................................................... 5-1
Chapter 6.......................................................................................................................... 6-1
Chapter 7.......................................................................................................................... 7-1
Chapter 8.......................................................................................................................... 8-1
Chapter 9.......................................................................................................................... 9-1
Chapter 10 .......................................................................................................................10-1
Chapter 11 .......................................................................................................................11-1
, Chapter 2:
Introduction to Solid State Devices
Problem 2.1:
A bipolar transistor is connected to a resistive load as shown in Figure 2.21. The
source voltage VCC = 60 V and RL = 5 .
Figure 2.21
In the saturation region, the collector-emitter voltage VCE = 5 V and = 6 .
While the transistor is in the saturation region, calculate the following:
a. Load current
b. Load power
c. Losses in the collector circuit
d. Losses in the base circuit
e. Efficiency of the circuit
Solution:
a. Load current:
IL = (VCC - VCE)/RL = (60 – 5)/5
= 11 A
b. Load power:
PL = IL * VL = IL * IL * RL = 605 W
c. Losses in the collector circuit:
plosscollector = VCE * IC
= VCE*IL (Since IC = IL)
= 5 * 11 = 55 W
d. Losses in the base circuit:
IC 11
Plossbase = IB*VBE = *V =
* 0.7 = 1.283W
6BE
e. Total Efficiency of the circuit = Total Useful Power/Total Power Input
2-1
, = 605/(605 + 55 + 1.283)
= 91.489%
Problem 2.2:
For the transistor in Problem 2.1, compute the load current, load power, and the
efficiency of the circuit when the transistor is in the cutoff region. Assume that
the collector current is 100 ma in the cutoff region.
Solution:
Cutoff region IC = 100 ma
Therefore, Iload = Ic = 100 ma
Load Power = i2load*RL = 0.01*5 = 0.05 W
P
Efficiency of the circuit = load = 0.05 = 0.833%
Pin 60 * 0.1
Problem 2.3:
Design a snubbing circuit for a power bipolar transistor that operates in a circuit
between a resistive load of 20 and an ac source of 120 V (rms), 60 Hz. The
available ratings of the transistor are
dvce 300 V/µ sec
dt =
max
dic
= 20 A/µ sec
dt
max
(Vce )max = 600 V
Solution:
Designing the snubbing circuit:
Dvscr
= 300 V/µs
dt
Discr
= 20 A/µs
Dt
R = 20
(Vce )max = 600 V
Assuming a 50% factor of safety design,
2-2
Drives 2nd Edition El Sharkawi / All Chapters
2 - 11
2nd Edition
,Fundamentals of Electric Drives 2nd Edition El Sharkawi
Solutions Manual
Contents
Chapter 2.......................................................................................................................... 2-1
Chapter 3.......................................................................................................................... 3-1
Chapter 4.......................................................................................................................... 4-1
Chapter 5.......................................................................................................................... 5-1
Chapter 6.......................................................................................................................... 6-1
Chapter 7.......................................................................................................................... 7-1
Chapter 8.......................................................................................................................... 8-1
Chapter 9.......................................................................................................................... 9-1
Chapter 10 .......................................................................................................................10-1
Chapter 11 .......................................................................................................................11-1
, Chapter 2:
Introduction to Solid State Devices
Problem 2.1:
A bipolar transistor is connected to a resistive load as shown in Figure 2.21. The
source voltage VCC = 60 V and RL = 5 .
Figure 2.21
In the saturation region, the collector-emitter voltage VCE = 5 V and = 6 .
While the transistor is in the saturation region, calculate the following:
a. Load current
b. Load power
c. Losses in the collector circuit
d. Losses in the base circuit
e. Efficiency of the circuit
Solution:
a. Load current:
IL = (VCC - VCE)/RL = (60 – 5)/5
= 11 A
b. Load power:
PL = IL * VL = IL * IL * RL = 605 W
c. Losses in the collector circuit:
plosscollector = VCE * IC
= VCE*IL (Since IC = IL)
= 5 * 11 = 55 W
d. Losses in the base circuit:
IC 11
Plossbase = IB*VBE = *V =
* 0.7 = 1.283W
6BE
e. Total Efficiency of the circuit = Total Useful Power/Total Power Input
2-1
, = 605/(605 + 55 + 1.283)
= 91.489%
Problem 2.2:
For the transistor in Problem 2.1, compute the load current, load power, and the
efficiency of the circuit when the transistor is in the cutoff region. Assume that
the collector current is 100 ma in the cutoff region.
Solution:
Cutoff region IC = 100 ma
Therefore, Iload = Ic = 100 ma
Load Power = i2load*RL = 0.01*5 = 0.05 W
P
Efficiency of the circuit = load = 0.05 = 0.833%
Pin 60 * 0.1
Problem 2.3:
Design a snubbing circuit for a power bipolar transistor that operates in a circuit
between a resistive load of 20 and an ac source of 120 V (rms), 60 Hz. The
available ratings of the transistor are
dvce 300 V/µ sec
dt =
max
dic
= 20 A/µ sec
dt
max
(Vce )max = 600 V
Solution:
Designing the snubbing circuit:
Dvscr
= 300 V/µs
dt
Discr
= 20 A/µs
Dt
R = 20
(Vce )max = 600 V
Assuming a 50% factor of safety design,
2-2
