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CEA 201 FE Question and answer already passed 2025/2026

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CEA 201 FE Question and answer already passed 2025/2026 The L1 cache is slower than the L3 cache. (T/F) - correct answer F The routine executed in response to an interrupt request is called ________ routine. - correct answer Interrupt Service Register indirect addressing uses the same number of memory references as indirect addressing. (T/F) - correct answer F The ________ gives a program access to the hardware resources and services available in a system through the user instruction set architecture supplemented with high-level language library calls. a. JCL b. ISA c. ABI d. API - correct answer API

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CEA 201 FE Question and answer
already passed 2025/2026
The L1 cache is slower than the L3 cache.

(T/F) - correct answer ✔F



The routine executed in response to an interrupt request is called ________ routine. - correct answer
✔Interrupt Service



Register indirect addressing uses the same number of memory references as indirect addressing.

(T/F) - correct answer ✔F



The ________ gives a program access to the hardware resources and services available in a system
through the user instruction set architecture supplemented with high-level language library calls.

a. JCL

b. ISA

c. ABI

d. API - correct answer ✔API



With direct addressing, the length of the address field is usually less than the word length, thus limiting
the address range.

(T/F) - correct answer ✔T



The operand ________ yields true if and only if both of its operands are true.

A. XOR

B. OR

,C. AND

D. NOT - correct answer ✔AND



An interrupt is a hardware-generated signal to the processor.

(T/F) - correct answer ✔T



A control hazard occurs when two or more instructions that are already in the pipeline need the same
resource.

(T/F) - correct answer ✔F



The register file employs much shorter addresses than addresses for cache and memory.

(T/F) - correct answer ✔T



It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit
or by a mechanism that makes repeated use of the add unit of the system.

A. Architectural

B. Memory

C. Mechanical

D. Organizational - correct answer ✔D) Organizational



An I/O channel has the ability to execute I/O instructions, which gives it complete control over I/O
operations.

(T/F) - correct answer ✔T



The method of using the same lines for multiple purposes is known as time multiplexing.

(T/F) - correct answer ✔T

, A __ instruction can be used to account for data and branch delays

A) SUB

B) NOOP

C) JUMP

D) ALL OF THE ABOVE - correct answer ✔B) NOOP



The disadvantage of immediate addressing is that the size of the number is restricted to the size of the
address field (T/F) - correct answer ✔T



A characteristic of ROM is that it is volatile (T/F) - correct answer ✔F



Interfaces between the computer and peripherals is an example of an organizational attribute.

(T/F) - correct answer ✔T



The operation ____ yields true if either or both of its operands are true .

A. NOT

B. AND

C. NAND

D. OR - correct answer ✔D. OR



When using the __________ technique all write operations made to main memory are made to the
cache as well.

A. Write back

B. LRU

C. Write through

D. Unified cache - correct answer ✔C. Write through

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CEA 201 FE

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