CEA 201 Test Questions And Answers
antidependency - ✔️✔ Correct Answer QN=7 Instead of the first
instruction producing a value that the second instruction uses, with
___________ the second instruction destroys a value that the first
instruction uses.
a. in-order issue
b. resource conflict
c. antidependency
d. out-of-order completion
state - ✔️✔ Correct Answer QN=8 ________ indicates whether
this micro-op is scheduled for execution, has been dispatched for
execution, or has completed execution and is ready for retirement.
a. State
b. Memory address
,c. Micro-op
d. Alias register
instruction-level parallelism - ✔️✔ Correct Answer QN=9
__________ exists when instructions in a sequence are independent
and thus can be executed in parallel by overlapping.
a. Flow dependency
b. Instruction-level parallelism
c. Machine parallelism
d. Instruction issue
machine parallelism - ✔️✔ Correct Answer QN=10 _________ is
determined by the number of instructions that can be fetched and
executed at the same time and by the speed and sophistication of the
mechanisms that the processor uses to find independent instructions.
a. Machine parallelism
,b. Instruction-level parallelism
c. Output dependency
d. Procedural dependency
instruction issue policy - ✔️✔ Correct Answer QN=11 ________
is a protocol used to issue instructions.
a. Micro-ops
b. Scalar
c. SIMD
d. Instruction issue policy
out-of-order completion - ✔️✔ Correct Answer QN=12
________ is used in scalar RISC processors to improve the
performance of instructions that require multiple cycles.
a. In-order completion
b. In-order issue
, c. Out-of-order completion
d. Out-of-order issue
all of the above - ✔️✔ Correct Answer QN=13 Which of the
following is a hardware technique that can be used in a superscalar
processor to enhance performance?
a. duplication of resources
b. out-of-order issue
c. renaming
d. all of the above
pentium pro - ✔️✔ Correct Answer QN=14 The ________
introduced a full-blown superscalar design with out-of-order
execution.
a. Pentium
b. Pentium Pro
antidependency - ✔️✔ Correct Answer QN=7 Instead of the first
instruction producing a value that the second instruction uses, with
___________ the second instruction destroys a value that the first
instruction uses.
a. in-order issue
b. resource conflict
c. antidependency
d. out-of-order completion
state - ✔️✔ Correct Answer QN=8 ________ indicates whether
this micro-op is scheduled for execution, has been dispatched for
execution, or has completed execution and is ready for retirement.
a. State
b. Memory address
,c. Micro-op
d. Alias register
instruction-level parallelism - ✔️✔ Correct Answer QN=9
__________ exists when instructions in a sequence are independent
and thus can be executed in parallel by overlapping.
a. Flow dependency
b. Instruction-level parallelism
c. Machine parallelism
d. Instruction issue
machine parallelism - ✔️✔ Correct Answer QN=10 _________ is
determined by the number of instructions that can be fetched and
executed at the same time and by the speed and sophistication of the
mechanisms that the processor uses to find independent instructions.
a. Machine parallelism
,b. Instruction-level parallelism
c. Output dependency
d. Procedural dependency
instruction issue policy - ✔️✔ Correct Answer QN=11 ________
is a protocol used to issue instructions.
a. Micro-ops
b. Scalar
c. SIMD
d. Instruction issue policy
out-of-order completion - ✔️✔ Correct Answer QN=12
________ is used in scalar RISC processors to improve the
performance of instructions that require multiple cycles.
a. In-order completion
b. In-order issue
, c. Out-of-order completion
d. Out-of-order issue
all of the above - ✔️✔ Correct Answer QN=13 Which of the
following is a hardware technique that can be used in a superscalar
processor to enhance performance?
a. duplication of resources
b. out-of-order issue
c. renaming
d. all of the above
pentium pro - ✔️✔ Correct Answer QN=14 The ________
introduced a full-blown superscalar design with out-of-order
execution.
a. Pentium
b. Pentium Pro
