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CDA 3101 Intro to Computer Organization - Finals Mock Exam Review - UF 2025

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CDA 3101 Intro to Computer Organization - Finals Mock Exam Review - UF 2025CDA 3101 Intro to Computer Organization - Finals Mock Exam Review - UF 2025CDA 3101 Intro to Computer Organization - Finals Mock Exam Review - UF 2025CDA 3101 Intro to Computer Organization - Finals Mock Exam Review - UF 2025

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May 28, 2025
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Written in
2024/2025
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CDA 3101 Introduction to Computer
Organization

Finals Mock Exam Review

(Questions & Solutions)

2025




©2025

, Question 1.
What is the primary distinction between computer organization and
computer architecture?
A) Computer organization emphasizes the implementation details
(hardware components and interconnections) that support the
processor's operation, while computer architecture defines the
programmer-visible features such as the instruction set.
B) Computer organization focuses solely on software optimization,
whereas computer architecture centers on electrical engineering
principles.
C) They are different names for the same concept in computing.
D) Computer organization specifies only the performance metrics, while
computer architecture defines cost constraints.

ANS: A
Rationale: Computer architecture encompasses the attributes visible to
and impacting the programmer—including the instruction set, data
types, and I/O mechanisms—whereas computer organization details the
hardware structures (e.g., ALU, control unit, registers) that implement
these features.

---

Question 2.
Which of the following best describes the function of the control unit in a
CPU?
A) It performs arithmetic and logical operations.
B) It fetches and decodes instructions, then generates the appropriate
control signals to coordinate the execution of those instructions.
C) It manages secondary storage devices.
D) It allocates memory dynamically to executing processes.

ANS: B
Rationale: The control unit orchestrates the operation of the CPU by
©2025

,retrieving instructions from memory, decoding them, and producing the
necessary control signals to manage data movement and operations
within the processor.

---

Question 3.
In a pipelined CPU, which technique is most effective in mitigating data
hazards with minimal performance penalties?
A) Inserting stall (NOP) cycles between instructions
B) Implementing data forwarding (bypassing) to route intermediate
values directly between pipeline stages
C) Redesigning the pipeline to reduce the number of stages
D) Rewriting the instruction set to eliminate dependencies

ANS: B
Rationale: Data forwarding (or bypassing) routes results directly from
one pipeline stage to another without waiting for them to be written
back to registers, thus minimizing stalls and keeping the pipeline full.

---

Question 4.
Which cache mapping technique ensures that each block from main
memory is mapped to exactly one cache line?
A) Direct-mapped cache
B) Set-associative cache
C) Fully associative cache
D) Hybrid mapping

ANS: A
Rationale: In direct-mapped caches, each main memory block is
assigned to one specific cache line, making the mapping simple though
sometimes more prone to conflict misses.


©2025

, ---

Question 5.
Which of the following is a characteristic advantage of RISC architectures
over CISC?
A) Simpler instructions that facilitate higher clock speeds and efficient
pipelining
B) More complex addressing modes for versatile instruction sets
C) Reliance on microcode for executing complex instructions
D) A smaller register file that conserves silicon area

ANS: A
Rationale: Reduced Instruction Set Computer (RISC) architectures use a
simplified set of instructions that can be executed very quickly and
efficiently in a pipelined design, often leading to higher performance
despite potentially executing more instructions.

---

Question 6.
In a microprogrammed control unit, which mechanism is used to
generate control signals?
A) Hardwired logic circuits exclusively
B) A sequence of microinstructions stored in a dedicated control memory
C) The arithmetic-logic unit (ALU) directly
D) A fixed lookup table in the cache memory

ANS: B
Rationale: Microprogrammed control units use a control memory that
stores microinstructions; these microinstructions are sequenced to
produce the control signals that drive the CPU’s operation, offering
flexibility at the expense of a slight performance overhead compared to
hardwired control.

---
©2025

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