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Exam (elaborations)

ITE 272 Exam 2 Questions and Answers Latest Version 2025

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ITE 272 Exam 2 Questions and Answers Latest Version 2025 fetch - Answers data inputs are prepared for transformation into data outputs execution - Answers the transformation that takes place and the output is stored control unit (CU) - Answers moves data, access instructions, and controls the arithmetic logic unit registers - Answers internal storage locations in a CPU; each is capable of holding a single instruction or data item instruction and instruction sets op code - Answers the first group of bits and represents the instruction's unique binary number operands - Answers In an instruction's bit string, they're groups of bits after the op code that hold the instruction's input values; they can contain a data item or the location of a data item move - Answers copies data to storage locations and can copy data between any combination of registers and primary storage locations load - Answers data transfer from main memory into a register store - Answers data transfer from a register into primary storage unconditional branch - Answers changes the sequence of the instruction's execution in the program conditional branch - Answers changes the instruction execution only if the value is true halt - Answers suspends the normal flow of the program shift - Answers moves all values right or left; after shifting, empty positions are filled with 0s, and bit values shifted beyond the bit string's bounds are discarded complex instruction set computing (CISC) - Answers a philosophy of processor design that deliberately includes complex instructions in the instruction set reduced instruction set computing (RISC) - Answers a philosophy of processor design that limits the number and type of complex instructions in the instruction set clock rate - Answers the frequency at which the system clock generates timing pulses cycle time - Answers the inverse of clock rate; the time required to fetch and execute the simplest instruction in the instruction set benchmarks - Answers measures of CPU or computer performance when carrying out one or more specific tasks; used to compare performance caching - Answers storing data in cache memory pipelining - Answers A method of organizing CPU circuitry so that multiple instructions can be in different stages of execution at the same time; a form of parallel processing branch prediction - Answers An approach to dealing with conditional branches in which the CPU guesses whether a branch condition will be true or false based on past experience; a form of parallel processing

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Institution
ITE 272
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ITE 272

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Uploaded on
March 12, 2025
Number of pages
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Written in
2024/2025
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ITE 272 Exam 2 Questions and Answers Latest Version 2025

fetch - Answers data inputs are prepared for transformation into data outputs

execution - Answers the transformation that takes place and the output is stored

control unit (CU) - Answers moves data, access instructions, and controls the arithmetic logic unit

registers - Answers internal storage locations in a CPU; each is capable of holding a single instruction or
data item instruction and instruction sets

op code - Answers the first group of bits and represents the instruction's unique binary number

operands - Answers In an instruction's bit string, they're groups of bits after the op code that hold the
instruction's input values; they can contain a data item or the location of a data item

move - Answers copies data to storage locations and can copy data between any combination of
registers and primary storage locations

load - Answers data transfer from main memory into a register

store - Answers data transfer from a register into primary storage

unconditional branch - Answers changes the sequence of the instruction's execution in the program

conditional branch - Answers changes the instruction execution only if the value is true

halt - Answers suspends the normal flow of the program

shift - Answers moves all values right or left; after shifting, empty positions are filled with 0s, and bit
values shifted beyond the bit string's bounds are discarded

complex instruction set computing (CISC) - Answers a philosophy of processor design that deliberately
includes complex instructions in the instruction set

reduced instruction set computing (RISC) - Answers a philosophy of processor design that limits the
number and type of complex instructions in the instruction set

clock rate - Answers the frequency at which the system clock generates timing pulses

cycle time - Answers the inverse of clock rate; the time required to fetch and execute the simplest
instruction in the instruction set

benchmarks - Answers measures of CPU or computer performance when carrying out one or more
specific tasks; used to compare performance

caching - Answers storing data in cache memory

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