Exam (elaborations) VLSI

ASIC (Application Specific Integrated Circuits) - ANS-Separate teams to design and verify. -Physical design is (semi-) automated. -Loops to get device operating frequency correct can be troubling. Constant-Voltage Scaling definition: - ANS-Sometimes it is impractical to scale the voltages -This can be due to: 1) existing I/O interface levels. 2) existing platform power supplies. 3) complexity of integrating multiple power supplies on chip. -Constant-Voltage Scaling refers to scaling the physical quantities (W,L,tox,xj,NA) but leaving the voltages un-scaled (VT0, VGS, VDS) -While this has some system advantages, it can lead to some unwanted increases in MOSFET characteristics. Design Quality - ANSTestability: -Generation of good test vectors. -Availability of reliable test fixture at speed. -Design of testable chip. Yield and Manufacturability: -Functional yield: tested for functionality at lower than required speed. -Parametric yield: tested for functionality at required speed Reliability: -Electrostatic discharge (ESD) -Electromigration -Oxide breakdown -Power and group bouncing -On-chip noise and cross-talk Technology updateability: Elmore Delay - ANSThe technique to estimate the overall delay between two nodes of an RC network tree. Full Custom - ANSGives the designer the most freedom. -Lots of rope -Can be clever -Can hang yourselves too