ATT FC Week 9 Exam Questions With 100% Correct Answers 2023

Why is an input that is hooked to ground low? - It is shorted to ground Is an input hooked to source high or low? - High What is the output of inputs that are shorted together? - Floating What are the two states of digital waveforms? - True or False High or Low 0 or 1 What three things does a buffer act like? - Amplifier/ Driver Protection Switch What type of ICs are used for digital application? - Linear What led to the creation of ICs? - Semiconductive material/ Transistors Which ESD is the most sensitive to static electricity? - MOSFET How is an ESD identified? - Black and yellow packaging Which order do you troubleshoot combinational Gates? - input to output Why is a logic probe best suited to measure gates? - It can detect pulse Which component is normally not found in ICs? - Inductors How many devices are in an SSI? - less than 12 How many devices are in an MSI? - 12 - 99 How many devices are in an LSI? - 100 - 999 How many devices are in a VLSI? - 1,000 - 99,999 How many devices are in an ULSI? - 100,000 or more Data Book - Used to provide Descriptions, Diagrams and characteristics of ICs Why are ESDs so sensitive to static electricity? - The operate with very low current and voltage levels How does humidity effect ESDs? - It will affect magnitude and static charge Static Electricity - Phenomenon created by rubbing two materials together Tools, work surface, and floors must be ________________ when working with ESDs. - Grounded What causes internal IC faults? - internal component failure Combinational Logic - Combining two or more gates Quad - There are 4 Universal logic gate - Quad NAND IC What is the purpose of a flip flop? - To store information until the next input pulse is delivered Q and QNOT - outputs of all gates; and are complimentary outputs RS flip flop input - S and R Clock RS flip flop inputs - S, R, and C D-type flip flop inputs - D and C JK flip flop inputs - J, K, and C What is unique about the JK flip flop output? - Toggle Condition Preset and Clear - Override everything else Clock must be __________ for D-type to work - High Preset and Clear are active when? - signal goes low AND Gate - Low when there are not two highs OR Gate - If high is present outputs are high inverter - flips the output conditions of a gate XOR - two of the same input result in a low output but opposite will be high Two highs in an RS are ____________ - invalid carrot with inverter indicates a _________________ - active during trailing edge Just a Carrot indicates ____________ - active during leading edge An inverter at the input indicates ___________ - active during lows If clock is low and you have no other information - what you have is unknown Combinational gates differ from flip flops how? - they have no feedback loop