TEST BANK FOR Digital Fundamentals 10th Edition By Floyd, Buchla (Instructor Solution Manual)

Exam (elaborations) TEST BANK FOR Digital Fundamentals 10th Edition By Floyd, Buchla (Instructor Solution Manual) Online Instructor’s Manual to accompany Digital Fundamentals Tenth Edition Thomas L. Floyd Upper Saddle River, New Jersey Columbus, Ohio CONTENTS PART 1: PROBLEM SOLUTIONS ............................................................................................1 CHAPTER 1 Introductory Concepts ............................................................................................2 CHAPTER 2 Number Systems, Operations, and Codes ..............................................................7 CHAPTER 3 Logic Gates ..........................................................................................................23 CHAPTER 4 Boolean Algebra and Logic Simplification..........................................................35 CHAPTER 5 Combinational Logic Analysis.............................................................................60 CHAPTER 6 Functions of Combinational Logic.......................................................................95 CHAPTER 7 Latches, Flip-Flops, and Timers.........................................................................115 CHAPTER 8 Counters .............................................................................................................130 CHAPTER 9 Shift Registers ...................................................................................................159 CHAPTER 10 Memory and Storage ..........................................................................................175 CHAPTER 11 Programmable Logic and Software....................................................................185 CHAPTER 12 Signal Interfacing and Processing ......................................................................195 CHAPTER 13 Computer Concepts ............................................................................................204 CHAPTER 14 Integrated Circuit Technologies .........................................................................210 PART 2: SYSTEM APPLICATION ACTIVITY SOLUTIONS ..........................................217 CHAPTER 4 ............................................................................................................................218 CHAPTER 5 ............................................................................................................................221 CHAPTER 6 ............................................................................................................................223 CHAPTER 7 ............................................................................................................................228 CHAPTER 8 ............................................................................................................................230 CHAPTER 9 ............................................................................................................................233 CHAPTER 10 ............................................................................................................................234 CHAPTER 11 ............................................................................................................................235 PART 3: OVERVIEW OF IEEE STD. 91-1984 .....................................................................239 PART 4: LABORATORY SOLUTIONS FOR EXPERIMENTS IN DIGITAL FUNDAMENTALS by David Buchla......................................................................265 iii PART 1 Problem Solutions Chapter 1 2 CHAPTER 1 INTRODUCTORY CONCEPTS Section 1-1 Digital and Analog Quantities 1. Digital data can be transmitted and stored more efficiently and reliably than analog data. Also, digital circuits are simpler to implement and there is a greater immunity to noisy environments. 2. Pressure is an analog quantity. 3. A clock, a thermometer, and a speedometer can have either an analog or a digital output. Section 1-2 Binary Digits, Logic Levels, and Digital Waveforms 4. In positive logic, a 1 is represented by a HIGH level and a 0 by a LOW level. In negative logic, a 1 is represented by a LOW level, and a 0 by a HIGH level. 5. HIGH = 1; LOW = 0. See Figure 1-1. 6. A 1 is a HIGH and a 0 is a LOW: (a) HIGH, LOW, HIGH, HIGH, HIGH, LOW, HIGH (b) HIGH, HIGH, HIGH, LOW, HIGH, LOW, LOW, HIGH Chapter 1 3 7. See Figure 1-2. 8. T = 4 ms. See Figure 1-3. 9. f = 4 ms 1 = 1 T = 0.25 kHz = 250 Hz 10. The waveform in Figure 1-61 is periodic because it repeats at a fixed interval. 11. tW = 2 ms; T = 4 ms % duty cycle = ⎟⎠ ⎞ ⎜⎝ = ⎛ ⎟⎠ ⎞ ⎜⎝⎛ 4 ms W 100 2 ms T t 100 = 50% 12. See Figure 1-4. Chapter 1 4 13. Each bit time = 1 μs Serial transfer time = (8 bits)(1 μs/bit) = 8 μs Parallel transfer time = 1 bit time = 1 μs 14. T = 1 1 f 3.5 GHz = = 0.286 ns Section 1-3 Basic Logic Operations 15. LON = SW1 + SW2 + SW1 ⋅ SW2 16. An AND gate produces a HIGH output only when all of its inputs are HIGH. 17. AND gate. See Figure 1-5. 18. An OR gate produces a HIGH output when either or both inputs are HIGH. An exclusive-OR gate produces a HIGH if one input is HIGH and the other LOW. Section 1-4 Introduction to the System Concept 19. See Figure 1-6. Chapter 1 5 20. T = 10 kHz 1 = 100 μs Pulses counted = 100 s 100 ms μ = 1000 21. See Figure 1-7. Section 1-5 Fixed-Function Integrated Circuits 22. Circuits with complexities of from 100 to 10,000 equivalent gates are classified as large scale integration (LSI). 23. The pins of an SMT are soldered to the pads on the surface of a pc board, whereas the pins of a DIP feed through and are soldered to the opposite side. Pin spacing on SMTs is less than on DIPs and therefore SMT packages are physically smaller and require less surface area on a pc board. 24. See Figure 1-8. Chapter 1 6 Section 1-6 Test and Measurement Instruments 25. Amplitude = top of pulse minus base line V = 8 V − 1 V = 7 V 26. A flashing probe lamp indicates a continuous sequence of pulses (pulse train). Section 1-7 Introduction to Programmable Logic 27. The following do not describe PLDs: VHDL, AHDL 28. SPLD: Simple Programmable Logic Device CPLD: Complex Programmable Logic Device HDL: Hardware Description Language FPGA: Field-Programmable Gate Array GAL: Generic Array Logic 29. (a) Design entry: The step in a programmable logic design flow where a description of the circuit is entered in either schematic (graphic) form or in text form using an HDL. (b) Simulation: The step in a design flow where the entered design is simulated based on defined input waveforms. (c) Compilation: A program process that controls the design flow process and translates a design source code to object code for testing and downloading. (d) Download: The process in which the design is transferred from software to hardware. 30. Place and route or fitting is the process where the logic structures described by the netlist are mapped into the actual structure of the specific target device. This results in an output called a bitstream. 7 CHAPTER 2 NUMBER SYSTEMS, OPERATIONS, AND CODES Section 2-1 Decimal Numbers 1. (a) 1386 = 1 × 103 + 3 × 102 + 8 × 101 + 6 × 100 = 1 × 1000 + 3 × 100 + 8 × 10 + 6 × 1 The digit 6 has a weight of 100 = 1 (b) 54,692 = 5 × 104 + 4 × 103 + 6 × 102 + 9 × 101 + 2 × 100 = 5 × 10,000 + 4 × 1000 + 6 × 100 + 9 × 10 + 2 × 1 The digit 6 has a weight of 102 = 100 (c) 671,920 = 6 × 105 + 7 × 104 + 1 × 103 + 9 × 102 + 2 × 101 + 0 × 100 = 6 × 100,000 + 7 × 10,000 + 1 × 1000 + 9 × 100 + 2 × 10 + 0 × 1 The digit 6 has a weight of 105 = 100,000 2. (a) 10 = 101 (b) 100 = 102 (c) 10,000 = 104 (d) 1,000,000 = 106 3. (a) 471 = 4 × 102 + 7 × 101 + 1 × 100 = 4 × 100 + 7 × 10 + 1 × 1 = 400 + 70 + 1 (b) 9,356 = 9 × 103 + 3 × 102 + 5 × 101 + 6 × 100 = 9 × 1000 + 3 × 100 + 5 × 10 + 6 × 1 = 9,000 + 300 + 50 + 6 (c) 125,000 = 1 × 105 + 2 × 104 + 5 × 103 = 1 × 100,000 + 2 × 10,000 + 5 × 1000 = 100,000 + 20,000 + 5,000 4. The highest four-digit decimal number is 9999. Section 2-2 Binary Numbers 5. (a) 11 = 1 × 21 + 1 × 20 = 2 + 1 = 3 (b) 100 = 1 × 22 + 0 × 21 + 0 × 20 = 4 (c) 111 = 1 × 22 + 1 × 21 + 1 × 20 = 4 + 2 + 1 = 7 (d) 1000 = 1 × 23 + 0 × 22 + 0 × 21 + 0 × 20 = 8 (e) 1001 = 1 × 23 + 0 × 22 + 0 × 21 + 1 × 20 = 8 + 1 = 9 (f) 1100 = 1 × 23 + 1 × 22 + 0 × 21 + 0 × 20 = 8 + 4 = 12 (g) 1011 = 1 × 23 + 0 × 22 + 1 × 21 + 1 × 20 = 8 + 2 + 1 = 11 (h) 1111 = 1 × 23 + 1 × 22 + 1 × 21 + 1 × 20 = 8 + 4 + 2 + 1 = 15 Chapter 2 8 6. (a) 1110 = 1 × 23 + 1 × 22 + 1 × 21 = 8 + 4 + 2 = 14 (b) 1010 = 1 × 23 + 1 × 21 = 8 + 2 = 10 (c) 11100 = 1 × 24 + 1 × 23 + 1 × 22 = 16 + 8 + 4 = 28 (d) 10000 = 1 × 24 = 16 (e) 10101 = 1 × 24 + 1 × 22 + 1 × 20 = 16 + 4 + 1 = 21 (f) 11101 = 1 × 24 + 1 × 23 + 1 × 22 + 1 × 20 = 16 + 8 + 4 + 1 = 29 (g) 10111 = 1 × 24 + 1 × 22 + 1 × 21 + 1 × 20 = 16 + 4 + 2 + 1 = 23 (h) 11111 = 1 × 24 + 1 × 23 + 1 × 22 + 1 × 21 + 1 × 20 = 16 + 8 + 4 + 2 + 1 = 31 7. (a) .11 = 1 × 25 + 1 × 24 + 1 × 21 + 1 × 20 + 1 × 2−1 + 1 × 2−2 = 32 + 16 + 2 + 1 + 0.5 + 0.25 = 51.75 (b) .01 = 1 × 25 + 1 × 23 + 1 × 21 + 1 × 2−2 = 32 + 8 + 2 + 0.25 = 42.25 (c) .111 = 1 × 26 + 1 × 20 + 1 × 2−1 + 1 × 2−2 + 1 × 2−3 = 64 + 1 + 0.5 + 0.25 + 0.125 = 65.875 (d) .101 = 1 × 26 + 1 × 25 + 1 × 24 + 1 × 23 + 1 × 2−1 + 1 × 2−3 = 64 + 32 + 16 + 8 + 0.5 + 0.125 = 120.625 (e) .10101 = 1 × 26 + 1 × 24 + 1 × 23 + 1 × 22 + 1 × 2−1 + 1 × 2−3 + 1 × 2−5 = 64 + 16 + 8 + 4 + 0.5 + 0.125 + 0.03125 = 92.65625 (f) .0001 = 1 × 26 + 1 × 25 + 1 × 24 + 1 × 20 + 1 × 2−4 = 64 + 32 + 16 + 1 + 0.0625 = 113.0625 (g) .1010 = 1 × 26 + 1 × 24 + 1 × 23 + 1 × 21 + 1 × 2−1 + 1 × 2−3 = 64 + 16 + 8 + 2 + 0.5 + 0.125 = 90.625 (h) .11111 = 1 × 26 + 1 × 25 + 1 × 24 + 1 × 23 + 1 × 22 + 1 × 21 + 1 × 20 + 1 × 2−1 + 1 × 2−2 + 1 × 2−3 + 1 × 2−4 + 1 × 2−5 = 64 + 32 + 16 + 8 + 4 + 2 + 1 + 0.5 + 0.25 + 0.125 + 0.0625 + 0.03125 = 127.96875 8. (a) 22 − 1 = 3 (b) 23 − 1 = 7 (c) 24 − 1 = 15 (d) 25 − 1 = 31 (e) 26 − 1 = 63 (f) 27 − 1 = 127 (g) 28 − 1 = 255 (h) 29 − 1 = 511 (i) 210 − 1 = 1023 (j) 211 − 1 = 2047 9. (a) (24 − 1) < 17 < (25 − 1); 5 bits (b) (25 − 1) < 35 < (26 − 1); 6 bits (c) (25 − 1) < 49 < (26 − 1); 6 bits (d) (26 − 1) < 68 < (27 − 1); 7 bits (e) (26 − 1) < 81 < (27 − 1); 7 bits (f) (26 − 1) < 114 < (27 − 1); 7 bits (g) (27 − 1) < 132 < (28 − 1); 8 bits (h) (27 − 1) < 205 < (28 − 1); 8 bits Chapter 2 9 10. (a) 0 through 7: 000, 001, 010, 011, 100, 101, 110, 111 (b) 8 through 15: 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111 (c) 16 through 31: 10000, 10001, 10010, 10011, 10100, 10101, 10110, 10111, 11000, 11001, 11010, 11011, 11100, 11101, 11110, 11111 (d) 32 through 63: , , , , , , , , 10100, , , , , , , , , , , , , , , , , , , , , , , (e) 64 through 75: , , , , , , , , , , , Section 2-3 Decimal-to-Binary Conversion 11. (a) 10 = 8 + 2 = 23 + 21 = 1010 (b) 17 = 16 + 1 = 24 + 20 = 10001 (c) 24 = 16 + 8 = 24 + 23 = 11000 (d) 48 = 32 + 16 = 25 + 24 = (e) 61 = 32 + 16 + 8 + 4 + 1 = 25 + 24 + 23 + 22 + 20 = (f) 93 = 64 + 16 + 8 + 4 + 1 = 26 + 24 + 23 + 22 + 20 = (g) 125 = 64 + 32 + 16 + 8 + 4 + 1 = 26 + 25 + 24 + 23 + 22 + 20 = (h) 186 = 128 + 32 + 16 + 8 + 2 = 27 + 25 + 24 + 23 + 21 = 12. (a) 0.32 ≅ 0.00 + 0.25 + 0.0625 + 0.0 + 0.0 + 0. = 0. (b) 0.246 ≅ 0.0 + 0.0 + 0.125 + 0.0625 + 0.03125 + 0. = 0. (c) 0.0981 ≅ 0.0 + 0.0 + 0.0 + 0.0625 + 0.03125 + 0.0 + 0.0 + 0. = 0. Chapter 2 10 13. (a) 2 15 = 7, R = 1( LSB) 2 7 = 3, R = 1 2 3 = 1, R = 1 2 1 = 0, R = 1 (MSB) (d) 2 34 = 17, R = 0 (LSB) 2 17 = 8, R = 1 2 8 = 4, R = 0 2 4 = 2, R = 0 2 2 = 1, R = 0 2 1 = 0, R = 1 (MSB) (g) 2 65 = 32, R = 1 (LSB) 2 32 = 16, R = 0 2 16 = 8, R = 0 2 8 = 4, R = 0 2 4 = 2, R = 0 2 2 = 1, R = 0 2 1 = 0, R = 1(MSB) (b) 2 21 = 10, R = 1 (LSB) 2 10 = 5, R = 0 2 5 = 2, R = 1 2 2 = 1, R = 0 2 1 = 0, R = 1 (MSB) (e) 2 40 = 20, R = 0 (LSB) 2 20 = 10, R = 0 2 10 = 5, R = 0 2 5 = 2, R = 1 2 2 = 1, R = 0 2 1 = 0, R = 1 (MSB) (h) 2 73 = 36, R = 1 (LSB) 2 36 = 18, R = 0 2 18 = 9, R = 0 2 9 = 4, R = 1 2 4 = 2, R = 0 2 2 = 1, R = 0 2 1 = 0, R = 1 (MSB) (c) 2 28 = 14, R = 0 (LSB) 2 14 = 7, R = 0 2 7 = 3, R = 1 2 3 = 1, R = 1 2 1 = 0, R = 1 (MSB) (f) 2 59 = 29, R = 1 (LSB) 2 29 = 14, R = 1 2 14 = 7, R = 0 2 7 = 3, R = 1 2 3 = 1, R = 1 2 1 = 0, R = 1 (MSB) Chapter 2 11 14. (a) 0.98 × 2 = 1.96 1 (MSB) (b) 0.347 × 2 = 0.694 0 (MSB) 0.96 × 2 = 1.92 1 0.694 × 2 = 1.388 1 0.92 × 2 = 1.84 1 0.388 × 2 = 0.776 0 0.84 × 2 = 1.68 1 0.776 × 2 = 1.552 1 0.68 × 2 = 1.36 1 0.552 × 2 = 1.104 1 0.36 × 2 = 0.72 0 0.104 × 2 = 0.208 0 continue if more accuracy is desired 0.208 × 2 = 0.416 0 0. continue if more accuracy is desired 0. (c) 0.9028 × 2 = 1.8056 1 (MSB) 0.8056 × 2 = 1.6112 1 0.6112 × 2 = 1.2224 1 0.2224 × 2 = 0.4448 0 0.4448 × 2 = 0.8896 0 0.8896 × 2 = 1.7792 1 0.7792 × 2 = 1.5584 1 continue if more accuracy is desired 0. Section 2-4 Binary Arithmetic 100 01 (a) 11 + 15. 1101 110 (d) 111 + 100 10 (b) 10 + 1110 0101 (e) 1001 + 1000 011 (c) 101 + 11000 1011 (f) 1101 + 10 01 (a) 11 − 16. 1011 0011 (d) 1110 − 001 100 (b) 101 − 0011 1001 (e) 1100 − 001 101 (c) 110 − 00011 10111 (f) 11010 − Chapter 2 12 1001 11 11 11 (a) 11 × 17. 1101 1101 0000 1101 1101 (e) 1101 × 1000 100 000 10 (b) 100 × 1110 1110 0000 1110 1101 (f) 1110 × 111 000 111 101 (c) 111 × 1001 1001 0000 110 (d) 1001 × 18. (a) 10 100 = 010 (b) 0011 1001 = 0011 (c) 0100 1100 = 0011 Section 2-5 1’s and 2’s Complements of Binary Numbers 19. Zero is represented in 1’s complement as all 0’s (for +0) or all 1’s (for −0). 20. Zero is represented by all 0’s only in 2’s complement. 21. (a) The 1’s complement of 101 is 010. (b) The 1’s complement of 110 is 001. (c) The 1’s complement of 1010 is 0101. (d) The 1’s complement of is . (e) The 1’s complement of is . (f) The 1’s complement of 00001 is 11110. 22. Take the 1’s complement and add 1: (a) 01 + 1 = 10 (b) 000 + 1 = 001 (c) 0110 + 1 = 0111 (d) 0010 + 1 = 0011 (e) 00011 + 1 = 00100 (f) 01100 + 1 = 01101 (g) + 1 = (h) + 1 = Chapter 2 13 Section 2-6 Signed Numbers 23. (a) Magnitude of 29 = (b) Magnitude of 85 = + 29 = −85 = (c) Magnitude of 10010 = (d) Magnitude of 123 = +100 = −123 = 24. (a) Magnitude of 34 = (b) Magnitude of 57 = −34 = +57 = (c) Magnitude of 99 = (d) Magnitude of 115 = −99 = +115 = 25. (a) Magnitude of 12 = 1100 (b) Magnitude of 68 = +12 = −68 = (c) Magnitude of 10110 = (d) Magnitude of 125 = +10110 = −125 = 26. (a) = −25 (b) = +116 (c) = −63 27. (a) = −() = −102 (b) = +() = +116 (c) = −() = −64 28. (a) = −() = −103 (b) = +() = +116 (c) = −() = −65 29. (a) → sign = 0 1.01011 × 214 → exponent = 127 + 14 + 141 = Mantissa = 00000 00000 (b) → sign = 1 1.00 × 211 → exponent = 127 + 11 = 138 = Mantissa = 00000 00000 30. (a) 00000 Sign = 1 Exponent = = 129 − 127 = 2 Mantissa = 1.10001 × 22 = 101.001 −101.001 = −5. (b) 00000 Sign = 0 Exponent = = 204 − 127 = 77 Mantissa = 1. 1. × 277 Chapter 2 14 Section 2-7 Arithmetic Operations with Signed Numbers 31. (a) 33 = 15 = + (c) 46 = −46 = + 25 = (b) 56 = 27 = + −27 = (d) 11010 = −11010 = + 84 = −84 = 32. (a) (b) + + 33. (a) (b) + + 34. (a) − + 1 (b) − + 35. × × 0 10 Changing to 2’s complement with sign: 010 36. = 25 68 = 2, remainder of 18 Section 2-8 Hexadecimal Numbers 37. (a) 3816 = (b) 5916 = (c) A1416 = (d) 5C816 = (e) = (f) FB1716 = (g) 8A9D16 = Chapter 2 15 38. (a) 1110 = E16 (b) 10 = 216 (c) = 1716 (d) = A616 (e) = 3F016 (f) = 98216 39. (a) 2316 = 2 × 161 + 3 × 160 = 32 + 3 = 35 (b) 9216 = 9 × 161 + 2 × 160 = 144 + 2 = 146 (c) 1A16 = 1 × 161 + 10 × 160 = 16 + 10 = 26 (d) 8D16 = 8 × 161 + 13 × 160 = 128 + 13 = 141 (e) F316 = 15 × 161 + 3 × 160 = 240 + 3 = 243 (f) EB16 = 14 × 161 + 11 × 160 = 224 + 11 = 235 (g) 5C216 = 5 × 162 + 12 × 161 + 2 × 160 = 1280 + 192 + 2 = 1474 (h) 70016 = 7 × 162 = 1792 40. (a) 16 8 = 0, remainder = 8 hexadecimal number = 816 (c) 16 33 = 2, remainder = 1 (LSD) 16 2 = 0, remainder = 2 hexadecimal number = 2116 (e) 16 284 = 17, remainder = 12 = C16 (LSD) 16 17 = 1, remainder = 1 16 1 = 0, remainder = 1 hexadecimal number = 11C16 (g) 16 4019 = 251, remainder = 3 (LSD) 16 251 = 15, remainder = 11 = B16 16 15 = 0, remainder = 15 = F16 hexadecimal number = FB316 (b) 16 14 = 0, remainder = 14 = E16 hexadecimal number = E16 (d) 16 52 = 3, remainder = 4 (LSD) 16 3 = 0, remainder = 3 hexadecimal number = 3416 (f) 16 2890 = 180, remainder = 10 = A16 (LSD) 16 180 = 11, remainder = 4 0 16 11 = , remainder = 11 = B16 hexadecimal number = B4A16 (h) 16 6500 = 406, remainder = 4 (LSD) 16 406 = 25, remainder = 6 16 25 = 1, remainder = 9 16 1 = 0, remainder = 1 hexadecimal number = 41. (a) 3716 + 2916 = 6016 (b) A016 + 6B16 = 10B16 (c) FF16 + BB16 = 1BA16 Chapter 2 16 42. (a) 5116 − 4016 = 1116 (b) C816 − 3A16 = 8E16 (c) FD16 − 8816 = 7516 Section 2-9 Octal Numbers 43. (a) 128 = 1 × 81 + 2 × 80 = 8 + 2 = 10 (b) 278 = 2 × 81 + 7 × 80 = 16 + 7 = 23 (c) 568 = 5 × 81 + 6 × 80 = 40 + 6 = 46 (d) 648 = 6 × 81 + 4 × 80 = 48 + 4 = 52 (e) 1038 = 1 × 82 + 3 × 80 = 64 + 3 = 67 (f) 5578 = 5 × 82 + 5 × 81 + 7 × 80 = 320 + 40 + 7 = 367 (g) 1638 = 1 × 82 + 6 × 81 + 3 × 80 = 64 + 48 + 3 = 115 (h) 10248 = 1 × 83 + 2 × 81 + 4 × 80 = 512 + 16 + 4 = 532 (i) 77658 = 7 × 83 + 7 × 82 + 6 × 81 + 5 × 80 = 3584 + 448 + 48 + 5 = 4085 44. (a) 8 15 = 1, remainder = 7 (LSD) 8 1 = 0, remainder =1 octal number = 178 (c) 8 46 = 5, remainder = 6 (LSD) 8 5 = 0, remainder = 5 octal number = 568 (e) 8 100 = 12, remainder = 4 (LSD) 8 12 = 1, remainder = 4 8 1 = 0, remainder = 1 octal number = 1448 (g) 8 219 = 27, remainder = 3 (LSD) 8 27 = 3, remainder = 3 8 3 = 0, remainder = 3 octal number = 3338 (b) 8 27 = 3, remainder = 3 (LSD) 8 3 = 0, remainder = 3 octal number = 338 (d) 8 70 = 8, remainder = 6 (LSD) 8 8 = 1, remainder = 0 8 1 = 0, remainder = 1 octal number = 1068 (f) 8 142 = 17, remainder = 6 (LSD) 8 17 = 2, remainder = 1 8 2 = 0, remainder = 2 octal number = 2168 (h) 8 435 = 54, remainder = 3 (LSD) 8 54 = 6, remainder = 6 8 6 = 0, remainder = 6 octal number = 6638 17 45. (a) 138 = 001 011 (b) 578 = 101 111 (c) 1018 = (d) 3218 = (e) 5408 = (f) 46538 = (g) = (h) = (i) = 011 46. (a) 111 = 78 (b) 010 = 28 (c) 110 111 = 678 (d) 101 010 = 528 (e) 001 100 = 148 (f) = 1368 (g) = 54318 (h) = 26038 (i) = Section 2-10 Binary Coded Decimal (BCD) 47. (a) 10 = (b) 13 = (c) 18 = (d) 21 = (e) 25 = (f) 36 = (g) 44 = (h) 57 = (i) 69 = (j) 98 = (k) 125 = 0001 (l) 156 = 48. (a) 10 = 10102 4 bits binary, 8 bits BCD (b) 13 = 11012 4 bits binary, 8 bits BCD (c) 18 = 5 bits binary, 8 bits BCD (d) 21 = 5 bits binary, 8 bits BCD (e) 25 = 5 bits binary, 8 bits BCD (f) 36 = 6 bits binary, 8 bits BCD (g) 44 = 6 bits binary, 8 bits BCD (h) 57 = 6 bits binary, 8 bits BCD (i) 69 = 7 bits binary, 8 bits BCD (j) 98 = 7 bits binary, 8 bits BCD (k) 125 = 7 bits binary, 12 ibts BCD (l) 156 = 8 bits binary, 12 bits BCD Chapter 2 18 49. (a) 104 = 0100 (b) 128 = (c) 132 = 0010 (d) 150 = (e) 186 = 0110 (f) 210 = 0010 (g) 359 = 0011 (h) 547 = (i) 1051 = 0101 0001 50. (a) 0001 = 1 (b) 0110 = 6 (c) 1001 = 9 (d) = 18 (e) = 19 (f) = 32 (g) = 45 (h) = 98 (i) = 870 51. (a) = 80 (b) = 237 (c) = 346 (d) 0100 = 421 (e) = 754 (f) 0000 = 800 (g) = 978 (h) = 1683 (i) 1001 0000 = 9018 (j) = 6667 52. (a) 0010 + 0001 0011 (d) 1000 + 0001 1001 (g) + (b) 0101 + 0011 1000 (e) + (h) + (c) 0111 + 0010 1001 (f) + Chapter 2 19 53. (a) 0110 1110 0110 1000 + + (c) 0110 10001 1000 1001 + + (e) 0110 + + (g) 101 + + (b) 0110 1100 0101 0111 + + (d) 0110 10000 0111 1001 + + (f) 001 0110 + + (h) 0110 001 000 001 + + invalid invalid invalid invalid invalid invalid invalid invalid Chapter 2 20 54. (a) 4 + 3 0111 0011 0100 + (c) 6 + 4 0110 1010 0100 0110 + + (e) 28 + 23 0110 + + (g) 113 + 101 100 001 011 + (b) 5 + 2 0111 0010 0101 + (d) 17 + 12 + (f) 65 + 58 011 + + (h) 295 + 157 010 100 111 101 + + Section 2-11 Digital Codes 55. The Gray code makes only one bit change at a time when going from one number in the sequence to the next number. Gray for 11112 = 1000 Gray for 00002 = 0000 56. (a) 1 + 1 + 0 + 1 + 1 Binary (b) 1 + 0 + 0 + 1 + 0 + 1 + 0 Binary 1 0 1 1 0 Gray 1 1 0 1 1 1 1 Gray (c) 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 Binary 1 0 0 0 1 1 0 0 1 1 0 0 1 Gray 57. (a) 1 0 1 0 Gray (b) 0 0 0 1 0 Gray 1 1 0 0 Binary 0 0 0 1 1 Binary (c) 1 1 0 0 0 0 1 0 0 0 1 Gray 1 0 0 0 0 0 1 1 1 1 0 Binary 58. (a) 1 → (b) 3 → (c) 6 → (d) 10 → (e) 18 → (f) 29 → (g) 56 → (h) 75 → (i) 107 → Chapter 2 21 59. (a) → CAN (b) → J (c) → = (d) → # (e) → > (f) → B 60. H e l l o . # H o w # a r e # y o u ? 61. 48 65 6C 6C 6F 2E 20 48 6F 20 79 6F 75 3F 62. 30 INPUT A, B 3 3316 0 3016 SP 2016 I 4916 N 4E16 P 5016 U 5516 T 5416 SP 2016 A 4116 , 2C16 B 4216 Section 2-12 Error Detection Codes 63. Code (b) has five 1s, so it is in error. 64. Codes (a) and (c) are in error because they have an even number of 1s. 65. (a) 1 (b) 0 (c) 1 Chapter 2 22 66. (a) 1100 1011 0111 + (b) 1111 0100 1011 + (c) + 67. (a) 1100 0111 1011 + (b) 1111 1011 0100 + (c) + In each case, you get the other number. 68. 000 1010 1001 1010 1100 1010 1100 1010 1100 1010 1100 1010 Remainder = 0110 Append remainder to data. 110 1010 1001 1010 1100 1010 1101 1010 1111 1010 1010 1010 0000 CRC is 110. 69. Error in MSB of transmitted CRC: 110 1010 1001 1010 1100 1010 1101 1010 1110 1010 1000 1010 1011 1010 10 Remainder is 10, indicating an error. 23 CHAPTER 3 LOGIC GATES Section 3-1 The Inverter 1. See Figure 3-1. 2. B: LOW, C: HIGH, D: LOW, E: HIGH, F: LOW 3. See Figure 3-2. Section 3-2 The AND Gate 4. See Figure 3-3. FIGURE 3-3 FIGURE 3-2 Chapter 3 24 5. See Figure 3-4. 6. See