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Summary Systems Architecture Exam Definitions(ALU, Control Unit, Registers) [Grade 9 Student Notes]

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Clear and concise OCR GCSE Computer Science Systems Architecture definitions, written in simple student-friendly language and matched closely to exam mark schemes. Written by a Grade 9 GCSE Student with score 154/160! This document includes: CPU structure and components (ALU, Control Unit, Registers, Accumulator) Cache memory and registers explained clearly Fetch–Decode–Execute (FDE) cycle definitions Von Neumann architecture Clock speed and CPU cores Embedded vs non-embedded systems Key programming concepts (sequence, selection, iteration) Ideal for: Last-minute revision Memorising definitions for 1–4 mark questions OCR GCSE Computer Science Paper 1 Perfect as a quick-reference definitions sheet before exams.

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Keyword Definition


(CPU) cache memory Primary memory between the CPU and main
memory. The CPU can receive data more quickly
from the cache than it can from main memory.
Stores recent and preempted instructions and
data.It is a lot smaller than the main memory, so
it has a limited storage capacity.


ALU (Arithmetic logic unit) Part of the CPU that does maths and logical
calculations.
The unit is inside the CPU.
The result of a calculation is stored in the
accumulator.
NOT A REGISTER ('unit' inside of the processor.)


CPU cache memory stores… 1.​ Stores a copy of recently used
instructions (as they are often needed
repeatedly)
2.​ Stores instructions the processor might
need next (i.e. it preempts what the
processor will need)


Accumulator A register in the CPU that stores the result of
the calculation done by the ALU (arithmetic logic
unit).




CPU (Central processing unit) Coordinates and carries out the fetching,
decoding and execution of instructions to
process data.




Control unit Controls the execution of an instruction.
Sends control and timing signals to other parts
of the CPU and other devices.




Decode (as part of the FDE cycle) This part of the cycle works out what the
instruction means.

, Execute (as part of the FDE cycle) The name given to the part of the cycle that
carries out an instruction.




FDE (Fetch, decode, execute) The three parts of every CPU cycle.




Fetch (as part of the FDE cycle) This part of the cycle gets an instruction from
main memory into the CPU.




Instruction register A register in the CPU that stores the instruction
that is currently being executed.




Memory address register The Memory Address Register stores the
address of where a value or instruction is to be
fetch from memory (or the address of where to
save a value back to memory)



Memory data register A register in the CPU that stores the
data/instruction that has been "read from"
(fetched from) memory, or stores the
data/instruction to be "written to" memory.




Program Counter A register that stores the address of where the
next instruction is in memory to execute.
Unless told otherwise, the value of the address
will automatically increase by 1. This is so that it
automatically points to the next instruction in
sequence.
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