Computer Architecture Multi-choice Terms in this set (101) A collection of eight bits is called a ............ A. byte B. word C. record D. field A. byte Interrupts which are initiated by an instruction are (1) A. internal B. hardware C. extern

Computer Architecture Multi-choice Terms in this set (101) A collection of eight bits is called a ............ A. byte B. word C. record D. field A. byte Interrupts which are initiated by an instruction are (1) A. internal B. hardware C. external D. software D. software A semiconductor memory constructed using bipolar transistors or a MOS transistor stores information in the form of a (1) A. flip-flop voltage levels B. bits C. bytes D. opcodes values A. flip-flop voltage levels A simple way of performing I/O tasks is to use a method known as (1) A. program-controlled I/O B. I/O operation C. program-controlled input D. program-controlled output A. program-controlled I/O Identify the correct definition of a dedicated computer. (1) A. A computer that is used by one and only one person B. A computer that is assigned to one and only one task C. A computer that runs one kind of software D. A computer that is meant for application software only B. A computer that is assigned to one and only one task Striking key stores the corresponding character code in an 8-bit buffer register associated with the keyboard. This register is called as ........................ (1) A. datainout B. dataout C. datain D. both A and B C. datain Circuitry that is used to move data is called a .......... (1) A. bus B. port C. disk D. memory A. bus Identify the term that aptly defines a program written as string of 0's and 1's. (1) A. symbolic micro-instruction B. binary micro-instruction C. symbolic micro-instruction D. binary microprogram D. binary microprogram The ALU of a computer normally contains a number of high speed storage elements called ........ (1) A. semiconductor memory B. registers C. hard disk D. magnetic disk B. registers Select the correct state which the CPU saves immediately it detects an interrupt. (1) A. Previous state B. Next state C. Current state D. Both A and B C. Current state What is the control unit's function in the CPU? (1) A. To transfer data to primary storage B. To store program instruction C. To perform logic operations C. To perform logic operations Computer Architecture Multi-choice What characteristic of RAM memory makes it not suitable for permanent storage? (1) A. too slow B. unreliable C. it is volatile D. too bulky C. it is volatile A binary digit is called a (1) A. Bit B. Byte C. Number D. Character A. Bit In terms of a hierarchical system, at each level there are important aspects that must concern us: (1) A. 1 B. 3 C. 2D. 4 C. 2 The hierarchical system is made up of: (1) A. Structure and Function B. RAM and ROM C. Structure and Business D. None of the above A. Structure and Function Write Through Technique is used in which memory for updating the data? (1) A. Virtual memory B. Main memory C. Auxiliary memory D. Cache memory D. Cache memory ......is the heart and the center of all manner of control on all operations in the performance of data processing functions by a system. (1) A. RAM B. ROM C. CPU D. All of the above C. CPU ........refers to those aspects of a computer system that have a direct bearing to the logical execution of a single task or a set thereof which we then collectively refer to as a program. (1) A. Computer Security B. Computer Architecture C. Systems analysis D. Programming B. Computer Architecture CPU fetches the instruction from memory according to the value of... (1) A. Program counter B. Status register C. Instruction register D. Program status word A. Program counter A memory buffer used to accommodate a speed differential is called. (1) A. Stack pointer B. Cache C. Accumulator D. Disk buffer B. Cache Which one of the following is the address generated by the CPU? (1) A. Physical address B. Absolute address C. Logical address D. None of the mentioned C. Logical address The function of a computer system is very simple, and performs. basic functions: (1) A. 1 B. 10 C. 4 D. None of the above C. 4 When the CPU is executing a Program that is part of the Operating System, it is said to be in.. (1) A. Interrupt mode B. System mode C. Half mode D. Simplex mode B. System mode ENIAC was the first general purpose digital electronic computer. It was a. and not a binary machine. (1) A. Decimal B. Integer C. A and B D. None of the above A. Decimal The first generation computers were known as (1) A. Tubes B. Cathode tubes C. Vacuum tubes D. None of the above C. Vacuum tubes The birth of Sperry and IBM was during the: (1) A. 1950 B. 1940 C. 1930 D. 1920 A. 1950 Computer Architecture Multi-choice The first successful machine IBM developed was the: (1) A. UNIVAC B. UNI C. VAC D. UNIVACUUM A. UNIVAC Second generation computers replaced the first generation and the fundamental change was the replacement of the vacuum tube with the (1) A. Transistor B. CU C. CPU D. Resistor A. Transistor A single self-contained transistor is called a. (1) A. Discrete component B. Indiscrete component C. Component A. Discrete component The world's first general-purpose microprocessor was an 8-bit machine with an 8-bit data path to memory. It was called the: (1) A. 8080 B. 8086 C. 8085 D. 9000 A. 8080 .............provides intermediate storage which is internal to the CPU a. ALU b. CPU c. System Interconnection d. All of the above a. ALU Where does a computer add and compare data? a. Hard disk b. Floppy disk c. CPU chip d. Memory chip c. CPU chip RAM stands for a. Random origin money b. Random only memory c. Read only memory d. Random access memory e. None of these d. Random access memory CPU does not perform the operation A. data transfer B. logic operation C. arithmetic operation A. data transfer Computer Architecture Multi-choice Virtual memory consists of _. A. Static RAM B. Dynamic RAM C. Magnetic memory D. None of these A. Static RAM Cache memory acts between _. A. CPU and RAM B. RAM and ROM C. CPU and Hard Disk D. None of these A. CPU and RAM The memory unit that communicates directly with the CPU is called the (A) main memory (B) Secondary memory (C) shared memory (D) auxiliary memory. (A) main memory Which memory unit has lowest access time? a. Cache b. Registers c. Magnetic Disk d. Main Memory E. Pen drive b. Registers Cache memory- a. has greater capacity than RAM b. is faster to access than CPU Registers c. is permanent storage d. faster to access than RAM e. None of these d. faster to access than RAM A complete microcomputer system consists of A) Microprocessor B) Memory C) Peripheral equipment D) All of above D) All of above A memory buffer used to accommodate a speed differential is called a) stack pointer b) cache c) accumulator d) disk buffer b) cache ...........refers to the mechanism which provides communication among the CPU, Main Memory and I/O. a. RAM b. ROM c. System Interconnection d. All of the above c. System Interconnection The main memory in a Personal Computer (PC) is made of (A) cache memory. (B) static RAM (C) Dynamic Ram (D) both (A) and (B) (D) both (A) and (B) A flip-flop is a binary cell capable of storing information of (A) One bit (B) Byte (C) Zero bit (D) Eight bit (A) One bit Which of the following registers is used to keep track of address of the memory location where the next instruction is located? a. Memory Address Register b. Memory Data Register c. Instruction Register d. Program Register d. Program Register Memory address refers to the successive memory words and the machine is called as ............ A) word addressable B) byte addressable C) bit addressable D) Tera byte addressable A) word addressable Which processor looks ahead in the instruction code fetched from memory and predicts which branches, or groups of instructions, are likely to be processed next a. CU b. CPU c. Branch Prediction D. A and C c. Branch Prediction The circuit converting binary data in to decimal is (A) Encoder (B) Multiplexer (C) Decoder (D) Code converter (D) Code converter The IAS structure of a von Neumann machine consisted of: a. A Main Memory, which stores both data and instructions b. An Arithmetic Logic Unit [ALU] capable of operating on binary data c. A and B d. None of the above c. A and B 20. The memory of the IAS of a von Neumann machine consisted of: a. 30 binary digits b. 50 binary digits c. 40 binary digitsd. 0 c. 40 binary digits 21. Instruction Buffer Register......... a. temporarily employed to hold the right- hand from a word in memory b. permanently employed to hold the right- hand from a word in memory c. contains the 8-bit opcode instruction that is currently being executed d. A and B a. temporarily employed to hold the right-hand from a word in memory 22. ...... and are a pair of registers used to hold temporary operands and intermediate results of ALU operations a. Accumulator [AC] & Multiplier Quotient [MQ] b. RAM and ROM c. CPU and CU D. None of the above a. Accumulator [AC] & Multiplier Quotient [MQ] Which processor analyzes which instructions are dependent on each other's results, or data to create an optimized schedule of instructions and this prevents unnecessary processing delays. a. CU b. Data Flow Analysis c. Branch Prediction D. A and C b. Data Flow Analysis Fragmentation is - a. dividing the secondary memory into equal sized fragments b. dividing the main memory into equal size fragments c. fragments of memory words used in a page d. fragments of memory words unused in a page d. fragments of memory words unused in a page When more than one processes are running concurrently on a system- a. batched system b. real-time system c. multi programming system d. multiprocessing system d. multiprocessing system ......form of addressing, the address field contains the effective address of the operand a. Immediate Addressing b. Direct Addressing b. Direct Addressing Computer Architecture Multi-choice In which kind of addressing does a field refers to a register than to a memory location. a. Immediate Addressing b. Direct Addressing c. Indirect Addressing D. Register Indirect Addressing D. Register Indirect Addressing The address of a page table in memory is pointed by a) stack pointer b) page table base register c) page register d) program counter b) page table base register ..........is a linear array of locations in memory. a. Register b. Stack c. Stack Addressing d. D. None of the above b. Stack ............... is an instruction format defines the layout of the bits of an instruction in terms of its constituent fields. a. Addressing Formats b. Stack c. Stack Addressing d. D. None of the above a. Addressing Formats Factors that go into the determination of addressing bits in the allocation of bits are: a. Number of addressing modes and number of operands b. Number of addressing modes c. number of operands d. none of the above a. Number of addressing modes and number of operands Run time mapping from virtual to physical address is done by a) Memory management unit b) CPU c) PCI d) None of the mentioned a) Memory management unit The BSA instruction is (A) Branch and store accumulator (B) Branch and save return address (C) Branch and shift address (D) Branch and show accumulator (B) Branch and save return address The fetch cycle has Steps? a. 4 b. 3 c. 5d. 6 b. 3 Computer Architecture Multi-choice The most common addressing techniques employed by a CPU is a. immediate b. direct c. indirect d. register d. register A pipeline is like .................... A) an automobile assembly line B) house pipeline C) both a and b D) a gas line A) an automobile assembly line In evaluating processor hardware and setting requirements for new systems, performance is one of the key parameters to consider along with....... a. Cost and size b. Brand c. Manufacturing location d. All of the above a. Cost and size Pipelining strategy is called implement a. instruction execution b. instruction pre-fetch c. instruction decoding d. instruction manipulation b. instruction pre-fetch A stack is a. an 8-bit register in the microprocessor b. a 16-bit register in the microprocessor c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer d. a 16-bit memory address stored in the program counter c. a set of memory locations in R/WM reserved for storing information temporarily during the execution of computer A register capable of shifting its binary information either to the right or the left is called a (A) parallel register. (B) serial register. (C) shift register. (D) storage register. (C) shift register. Which of the following is a main memory (A) Secondary memory. (B) Auxiliary memory. (C) Cache memory. (D) Virtual memory. (C) Cache memory. The maximum addressing capacity of a micro-processor which uses 16 bit database & 32 bit address base is (A) 64 K. (B) 4 GB. (C) both (A) & (B) (D) None of these. (B) 4 GB. When necessary, the results are transferred from the CPU to main memory by (A) I/O devices. (B) CPU. (C) Shift registers. (D) None of these. (B) CPU. The branch logic that provides decision making capabilities in the control unit is known as a. controlled transfer b. conditional transfer c. unconditional transfer d. none of above c. unconditional transfer Memory management technique in which system stores and retrieves data from secondary storage for use in main memory is called a) Fragmentation b) Paging c) Mapping d) None of the mentioned b) Paging The average time required to reach a storage location in memory and obtain its contents is called the (A) Seek time (B) Turnaround time (C) Access time (D) Transfer time (C) Access time If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be _. A. 11 bits B. 21 bits C. 16 bits D. 20 bits C. 16 bits A Stack-organised Computer uses instruction of _. A. Indirect B. Two-addressing C. Zero addressing D. Index addressing C. Zero addressing In a vectored interrupt. A. the branch address is assigned to a fixed location in memory. B. the interrupting source supplies the branch information to the processor through an interrupt vector. C. the branch address is obtained from a register in the processor D. none of the above B. the interrupting source supplies the branch information to the processor through an interrupt vector. _________ register keeps track of the instructions stored in program stored in memory. A. AR (Address Register) B. XR (Index Register) C. PC (Program Counter) D. AC (Accumulator) C. PC (Program Counter) Computers use addressing mode techniques for _. A. giving programming versatility to the user by providing facilities as pointers to memory counters for loop control B. to reduce no. of bits in the field of instruction C. specifying rules for modifying or interpreting address field of the instruction D. All the above D. All the above The CISC stands for a) Computer Instruction Set Compliment b) Complete Instruction Set Compliment c) Computer Indexed Set Components d) Complex Instruction set computer d) Complex Instruction set computer Each stage in pipelining should be completed within cycle. a) 1 b) 2 c) 3d) 4 a) 1 In pipelining the task which requires the least time is performed first. a) True b) False b) False The RISC processor has a more complicated design than CISC. a) True b) False b) False In CISC architecture most of the complex instructions are stored in _. a) Register b) Diodes c) CMOS d) Transistors d.Transistors The periods of time when the unit is idle is called as _. a) Stalls b) Bubbles c) Hazards d) Both a and b d) Both a and b The contention for the usage of a hardware device is called as _. a) Structural hazard b) Stalk c) Deadlock d) None of the mentioned a) Structural hazard The situation where in the data of operands are not available is called _. a) Data hazard b) Stock c) Deadlock d) Structural hazard a) Data hazard The computer architecture aimed at reducing the time of execution of instructions is _. a) CISC b) RISC c) ISA d) ANNA a) CISC The Sun micro systems processors usually follow architecture. a) CISC b) ISA c) ULTRA SPARC d) RISC d) RISC Which of the architecture is power efficient? a) CISC b) RISC c) ISA d) IANA b) RISC ______ have been developed specifically for pipelined systems. a) Utility software b) Speed up utilities c) Optimizing compilers d) None of the mentioned c) Optimizing compilers The pipelining process is also called as _. a) Superscalar operation b) Assembly line operation c) Von Neumann cycle d) None of the mentioned b) Assembly line operation The iconic feature of the RISC machine among the following are a) Reduced number of addressing modes b) Increased memory size c) Having a branch delay slot d) All of the abov c) Having a branch delay slot Both the CISC and RISC architectures have been developed to reduce the _. a) Cost b) Time delay c) Semantic gap d) All of the above c) Semantic gap Out of the following which is not a CISC machine. a) IBM 370/168 b) VAX 11/780 c) Intel 80486 d) Motorola A567 d) Motorola A567 Pipe-lining is a unique feature of _. a) RISC b) CISC c) ISA d) IANA a. RISC The fetch and execution cycles are interleaved with the help of _. a) Modification in processor architecture b) Clock c) Special unit d) Control unit b) Clock If a unit completes its task before the allotted time period, then a) It'll perform some other task in the remaining time b) Its time gets reallocated to different task c) It'll remain idle for the remaining time d) None of the mentioned c) It'll remain idle for the remaining time