C952 Computer Architecture - Parallelism via Instructions fully solved

C952 Computer Architecture - Parallelism via InstructionsMultiple Issue - correct answer A scheme whereby multiple instructions are launched in one clock cycle. Static multiple issue - correct answer An approach to implementing a multiple-issue processor where many decisions are made by the compiler before execution Dynamic multiple issue - correct answer An approach to implementing a multiple issue processor where many decisions are made during execution by the processor. Issue slot - correct answer The position from which instructions could issue in a given clock cycle Speculation - correct answer An approach whereby the compiler or processor guesses the outcome of an instruction to remove it as a dependence in executing other instructions Issue packet - correct answer The set of instructions that issues together in one clock cycle; the packet may be determined statically by the compiler or dynamically by the processor. Very Long Instruction Word (VLIW) - correct answer A style of instruction set architecture that launches many operations that are defined to be independent in a single wide instruction, typically with many separate opcode fields. Use latency - correct answer Number of clock cycles between a load instruction and an instruction that can use the result of the load without stalling the pipeline. Loop unrolling - correct answer A technique to get more performance from loops that access arrays, in which multiple copies of the loop body are made and instructions from different iterations are scheduled together.