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Summary IT Theory - Hardware

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Full summary, according to SAGS document, of IEB Information Technology Theory - Hardware section.

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HARDWARE
CPU
Measuring
CPU (Central Processing Unit) cores
legquad , dual

&
-
chip that has
primary responsibility for interpreting commands and
running programs
components ( all containing registers + connected to
memory via FSB) clock speed in GHz

CU (Control Unit) cache in MB
↳ controls execution of each instruction


↳ tells ALU , I10 devices how respond
memory ,
to to a
program's instructions

ALU CArithmetic
Logic Unit)

performs arithmetic +
logical operation/ calculations on
integer numbers

↳ break store in
down current instruction registers
-> Accumulator
=
register that stores the result of each execution (loaded from saved to RAM)


Registers (types
:
accumulator, address register storage register)
,




Store
↳ current instruction its data +
memory
+
access

↳ made from SRAM

↳ Word size =
width of register
+ data bus

↳ if 32 bit processes data in 32-bit ( :. 64 bits 2 phases)
7 doesn't meaneaster
te in
groups
if 64 bit >
processes data in 64-bit groups (... 64 bits in I phase

Types of processing
Serial processing processing instructions
-> one at a time

Parallel processing ->
multiple processors the same job
Isplit up between them (
,
processing




Em
Multi-processing >
multiple physical cores that share the
processing load
thread-set of instructions
↳ SMP
(Symmetrical MultiProcessing) =
multiple processors treated
equally instance of a computer
process =
ASMP program
-
(Asymmetrical MultiProcessing) =
different processors assigned special tasks being executed



Hyper-threading - multiple registers (i logical cores) that execute different threads of a
program
->
appears to execute
simultaneously
CO-Processors -
"Assistant" to CPU by taking
over burden of some of the
processing (process in parallel to <Pul

GPU -s takes task of complex mathematical geometric calc . needed for
graphics rendering (+ scientific computations)
->
Graphics card-u main components -> motherboard connection for data power

->
processor to render each pixel

(VRAM) to
memory to store details abt each pixel store completed pics temporarily

monitor connection view
images
-> to


->
Integrated graphics (GPU embedded on CPU , shares system RAM instead of Separate VRAM)

Advantages
->
- cost


+
->
less heat power
usage
Maths co-processor to
helps ALL process complex calculations
using numeric data


Advantage processed faster.
-> is calc .
improving performance

Disadvantages
-> In cost ,
required motherboard space , greater power consumption

CPU speed
Improving
->
->
Hyperthreading (1) logical core) -
Register size Secondary storage latency
-
Multiprocessing (11 physical core) -
Bus size
->
Buffers

->
Increasing level 1 ,7 , 3 Co-processors
->
/clock multiplication
cache Overclocking
-n




Latency to
time taken for a component to respond (blatency =>Tefficiency) (latency
= wasted clock ticks)

Seek time
- time taken for read/write head to find the
right track on
platters

Access time -> time taken to access data from HDD (latency +
seek time)

,

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Uploaded on
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Number of pages
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Written in
2023/2024
Type
SUMMARY

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