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Computer Architecture Chapter 2

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This document contains the questions students must familiarise themselves with on computer architecture chapter 2.

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Chapter 2 (x86 Processor Architecture) – Assessment
Question 1

True-False
Please indicate whether each statement is True (T) or False (F).

1.1 The control unit (CU) coordinates the sequencing of steps involved in executing
machine instructions.
1.2 The arithmetic logic unit performs addition, subtraction, multiplication, and
division operations.
1.3 Data travels along a bus with n bits running in parallel, where the bus is n bits
wide.
1.4 Another name for machine cycle is clock cycle.
1.5 The upper half of the RDX register is called EDX.
1.6 The lower half of the RCX register is called EBX.
1.7 The Carry flag reflects the status of an unsigned arithmetic operation.
1.8 The Zero flag is clear when the result of an arithmetic operation is zero.
1.9 The MMX register names are just different names for registers in the floating-
point unit.
1.10 Requests from hardware devices are called interrrupts.
1.11 In Real-address mode, multiple programs can run at the same time, but
they can only address physical memory.
1.12 When running in 64-bit mode, only the lowest 48 bits of address operands
are used.
1.13 In 64-bit mode, you can use three more general-purpose registers than in
32-bit mode.
1.14 When running in native 64-bit mode, processors do not support 16-bit
Real Mode.
1.15 The Basic Input-Output System is a collection of low-level subroutines
that communicate directly with hardware devices.



Question 2


Irvine, Kip R. Assembly Language for x86 Processors, 7th Edition 1
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