PHASE 1 REPORT:
PROJECT 1-Binary to PACKED BCD conversion and vice
versa
PROJECT 2- Up and down counter (version 2)
, Abstract
This phase consists of two projects, project 1 which deals with conversion from binary to BCD and vice
versa using Shift add-3 algorithm. Project 2 deals with designing a counter that is a microcontroller
based that will use two SSDs for display and implement switch debouncing. This counter will count up
and down between 00 and 99.
The program for both these projects was written an assembly language in MPLAB environment. The
code was then inserted into a PIC16F690 microcontroller for implementation of project 2. This system
was then simulated on proteus software, and the results showed that when 2nd switch pressed for the
first time, a digit 0 is shown on one SSD and a digit 1 is shown on the second SSD, yielding 01, If 2 nd
switch is pressed for the second time, then there’ll Increase by 1 in the displayed SSD value. The counter
was able to count up and down from 00 to 99 and reverse.
PROJECT 1-Binary to PACKED BCD conversion and vice
versa
PROJECT 2- Up and down counter (version 2)
, Abstract
This phase consists of two projects, project 1 which deals with conversion from binary to BCD and vice
versa using Shift add-3 algorithm. Project 2 deals with designing a counter that is a microcontroller
based that will use two SSDs for display and implement switch debouncing. This counter will count up
and down between 00 and 99.
The program for both these projects was written an assembly language in MPLAB environment. The
code was then inserted into a PIC16F690 microcontroller for implementation of project 2. This system
was then simulated on proteus software, and the results showed that when 2nd switch pressed for the
first time, a digit 0 is shown on one SSD and a digit 1 is shown on the second SSD, yielding 01, If 2 nd
switch is pressed for the second time, then there’ll Increase by 1 in the displayed SSD value. The counter
was able to count up and down from 00 to 99 and reverse.
