The MOV.W #34, &0x1000 will actually write the constant 34 into a flash memory location at
the address 0x1000. (Note: Cannot write into the flash memory using MOV.) correct answers
False
The MOV.W #40, &0x2800 will actually write the constant 0x28 into a memory location at the
address 0x2800. correct answers True
The program downloaded into the flash memory through a JTAG port will remain in the flash
memory only until the power is turned on (i.e., will be lost when the device is turned off). correct
answers False
The content of the flash memory is lost after the device is shut down. correct answers False
The content of the RAM memory is lost when a system goes into a low-power mode. correct
answers False
The content of the RAM memory remains intact if a MSP430 goes into a low-power mode.
correct answers True
The content of the RAM memory is lost when a system goes into a low-power mode. correct
answers False
The content of the general-purpose and special-purpose registers is preserved while the processor
is in a low-power mode. correct answers True
An instruction is executed to set certain bits in the status register to cause a transition from the
active mode into a low-power mode. correct answers True
An instruction is executed to clear certain bits in the status register to cause a transition from a
low-power mode into the active mode. correct answers False
To exit a low-power mode we can execute an instruction in an ISR to clear a copy of the status
register on the stack. correct answers True
MSP430 instruction set includes a multiply instruction that finds a product two unsigned
operands. correct answers False
The MSP430 devices can read/write a byte from memory only if is placed at an even address in
the address space. correct answers False
When a new interrupt request is received, the processor immediately stops processing the
currently executing instruction (before finishing it) and starts the exception processing. correct
answers False
, The RETI (return from interrupt) instruction retrieves both the status register and the program
counter from the stack. correct answers True
If multiple interrupt requests are pending, the processor selects the one that arrived first. correct
answers False
In case that multiple interrupt request sources share a single entry in the interrupt vector table,
programmers need to explicitly clear interrupt flag bits in the corresponding service routine .
correct answers True
If multiple interrupt requests are pending at the time of exception processing, the MSP430
selects the one with the highest priority. correct answers True
The GIE (Global Interrupt Enable) bit in the status register can be set inside an interrupt service
routine explicitly by the programmer to enable nesting of interrupts. correct answers True
The GIE bit in the status register can be set or cleared by the programmer at any point of time.
correct answers True
Interrupt service routines must end with a RET (MOV @SP+, PC) instruction that retrieves the
return address from the top of the stack. correct answers False
The interrupt vector table is filled with the starting addresses of the ISRs at the time of
manufacturing of the microcontroller and its content cannot be changed. correct answers False
The MSP430 automatically resets (in hardware) the relevant interrupt flags that record pending
requests for both single-sourced and multi-sourced interrupt service routines. correct answers
False
The interrupt request lines from the external devices can be connected on Port 3 lines P3.0 and
P3.1 that are configured as interrupt inputs. correct answers False
Each external device has its own interrupt service routine with a separate vector in the interrupt
vector table. correct answers False
A coming interrupt from ID2 can at any time interrupt the current interrupt service routine
servicing the interrupt from device ID1. correct answers False
The MSP430's clock module can internally generate clocks used by the processor and peripherals
or use external crystal oscillators. correct answers True
MCLK, SMCLK, and ACLK are fixed and cannot be changed in software. correct answers False
To prevent a controlled reset of the systems, the watchdog timer in the watchdog mode requires a
hardware signal to clear its control bit before the time period expires. correct answers False