The Arithmetic and Logic Unit (ALU)
● The ALU performs all arithmetic and logical operations within the CPU.
● Arithmetic operations: Addition, subtraction, etc.
● Logic operations: AND, OR, NOT, XOR.
● Results are stored temporarily in the Accumulator (ACC) or written to memory.
Control Unit (CU)
● The Control Unit directs the flow of data and instructions in the CPU.
● It interprets machine code instructions and signals other components to execute them.
● Controls the fetch-decode-execute cycle.
Registers
Registers are small, fast storage locations within the CPU used during processing:
● Program Counter (PC): Holds the address of the next instruction to be fetched.
● Accumulator (ACC): Temporarily stores the results of calculations or operations.
● Memory Address Register (MAR): Stores the address of the memory location to be
read from or written to.
● Memory Data Register (MDR): Temporarily holds the data fetched from or to be written
to memory.
● Current Instruction Register (CIR): Holds the current instruction being executed, split
into opcode and operand.
Buses
Buses are communication channels that transfer data between components:
● Data Bus: Transfers actual data between CPU, memory and other components.
● Address Bus: Carries memory addresses from the CPU to memory or I/O devices.
● Control Bus: Carries control signals (e.g., memory read/write, interrupt signals).
Relation to Assembly Language
● Assembly instructions operate at the register and memory level.
● Instructions like LOAD, STORE, and ADD use the MAR, MDR, and ACC.
● The PC increments to point to the next instruction, while the CIR interprets the opcode.
Fetch-Decode-Execute Cycle
1. Fetch:
○ PC value copied to MAR.
● The ALU performs all arithmetic and logical operations within the CPU.
● Arithmetic operations: Addition, subtraction, etc.
● Logic operations: AND, OR, NOT, XOR.
● Results are stored temporarily in the Accumulator (ACC) or written to memory.
Control Unit (CU)
● The Control Unit directs the flow of data and instructions in the CPU.
● It interprets machine code instructions and signals other components to execute them.
● Controls the fetch-decode-execute cycle.
Registers
Registers are small, fast storage locations within the CPU used during processing:
● Program Counter (PC): Holds the address of the next instruction to be fetched.
● Accumulator (ACC): Temporarily stores the results of calculations or operations.
● Memory Address Register (MAR): Stores the address of the memory location to be
read from or written to.
● Memory Data Register (MDR): Temporarily holds the data fetched from or to be written
to memory.
● Current Instruction Register (CIR): Holds the current instruction being executed, split
into opcode and operand.
Buses
Buses are communication channels that transfer data between components:
● Data Bus: Transfers actual data between CPU, memory and other components.
● Address Bus: Carries memory addresses from the CPU to memory or I/O devices.
● Control Bus: Carries control signals (e.g., memory read/write, interrupt signals).
Relation to Assembly Language
● Assembly instructions operate at the register and memory level.
● Instructions like LOAD, STORE, and ADD use the MAR, MDR, and ACC.
● The PC increments to point to the next instruction, while the CIR interprets the opcode.
Fetch-Decode-Execute Cycle
1. Fetch:
○ PC value copied to MAR.
