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Lecture notes

Half Adder Half Subtractor

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The document explains the Half Adder and Half Subtractor, their functionality, truth tables, and circuit diagrams. It details the required components, theory, and procedures for constructing and testing these basic combinational logic circuits. Designed for educational purposes, it focuses on understanding binary operations like addition and subtraction.

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Page No.
Class
Roll No,
Date 1202




half adder
Aum- To construt halt addex anl half subtyacioy aoae
test fheir funHonalitica.

APPARATUs ReQUIRED'
GY
No. Cam PonNEArSeECLELALION Qry
AND Gate
Ex-ORGate 1C 7486
3 ORGatg I7432
411xaine kit
5 Patch (OYOS Adeg uate


THEORy
’ HALE A0DER
HaLf adder combioational ixuit ahich cansisis
of tuo binaxyinput. uaxiables. called augtnd amd
Loddend amdtuo binazy outout vaxiables calle Gum
amd

he additian xCáult he
lauex Gignificamt bit is
calledsum aond higher Gignifiant hit called
The tyuth table af the half addex i giuen helou,
in that Sum becames
lcqic uhem ane af he
input s mamimum. amd it EQual a when
bathinputs equal
GCOE, JALGAON

, * CIRCUIT DuAGRAM

A
Sum AOB




CARRY= A8


fiq'- HALF A0DER




A




BorTow



ig- HALf SU8TRA (TOR.

Document information

Uploaded on
December 14, 2024
Number of pages
6
Written in
2024/2025
Type
Lecture notes
Professor(s)
Mali
Contains
All classes
£4.22

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