CEA201 Exam Study Questions, All Solved
100% Correct | Verified Answers | Pass
Guaranteed
A(n) _________ is generated by some condition that occurs as a result of an instruction
execution.
a. timer interrupt
b. I/O interrupt
c. program interrupt
d. hardware failure interrupt - ✔✔program interrupt
A __________ is the high-level set of rules for exchanging packets of data between devices.
a. bus
b. protocol
c. packet
d. QPI - ✔✔protocol
The QPI _________ layer is used to determine the course that a packet will traverse across the
available system interconnects.
a. link
b. protocol
c. routing
,d. physical - ✔✔routing
A sequence of codes or instructions is called __________.
a. software
b. memory
c. an interconnect
d. a register - ✔✔software
A bus that connects major computer components (processor, memory, I/O) is called a
__________.
a. system bus
b. address bus
c. data bus
d. control bus - ✔✔system bus
The _________ receives read and write requests from the software above the TL and creates
request packets for transmission to a destination via the link layer.
a. transaction layer
b. root layer
c. configuration layer
d. transport layer - ✔✔transaction layer
__________ refers to whether memory is internal or external to the computer.
a. Location
b. Access
c. Hierarchy
d. Tag - ✔✔Location
,Internal memory capacity is typically expressed in terms of _________.
a. hertz
b. nanos
c. bytes
d. LOR - ✔✔bytes
For internal memory, the __________ is equal to the number of electrical lines into and out of
the memory module.
a. access time
b. unit of transfer
c. capacity
d. memory ratio - ✔✔unit of transfer
"Memory is organized into records and access must be made in a specific linear sequence" is
a description of __________.
a. sequential access
b. direct access
c. random access
d. associative - ✔✔sequential access
individual blocks or records have a unique address based on physical location with __________.
a. associative
b. physical access
c. direct access
d. sequential access - ✔✔direct access
, For random-access memory, __________ is the time from the instant that an address is
presented to the memory to the instant that data have been stored or made available for use.
a. memory cycle time
b. direct access
c. transfer rate
d. access time - ✔✔access time
The ________ consists of the access time plus any additional time required before a second
access can commence.
a. latency
b. memory cycle time
c. direct access
d. transfer rate - ✔✔memory cycle time
A portion of main memory used as a buffer to hold data temporarily that is to be read out
to disk is referred to as a _________.
a. disk cache
b. latency
c. virtual address
d. miss - ✔✔disk cache
A line includes a _________ that identifies which particular block is currently being stored.
a. cache
b. hit
c. tag
d. locality - ✔✔tag
100% Correct | Verified Answers | Pass
Guaranteed
A(n) _________ is generated by some condition that occurs as a result of an instruction
execution.
a. timer interrupt
b. I/O interrupt
c. program interrupt
d. hardware failure interrupt - ✔✔program interrupt
A __________ is the high-level set of rules for exchanging packets of data between devices.
a. bus
b. protocol
c. packet
d. QPI - ✔✔protocol
The QPI _________ layer is used to determine the course that a packet will traverse across the
available system interconnects.
a. link
b. protocol
c. routing
,d. physical - ✔✔routing
A sequence of codes or instructions is called __________.
a. software
b. memory
c. an interconnect
d. a register - ✔✔software
A bus that connects major computer components (processor, memory, I/O) is called a
__________.
a. system bus
b. address bus
c. data bus
d. control bus - ✔✔system bus
The _________ receives read and write requests from the software above the TL and creates
request packets for transmission to a destination via the link layer.
a. transaction layer
b. root layer
c. configuration layer
d. transport layer - ✔✔transaction layer
__________ refers to whether memory is internal or external to the computer.
a. Location
b. Access
c. Hierarchy
d. Tag - ✔✔Location
,Internal memory capacity is typically expressed in terms of _________.
a. hertz
b. nanos
c. bytes
d. LOR - ✔✔bytes
For internal memory, the __________ is equal to the number of electrical lines into and out of
the memory module.
a. access time
b. unit of transfer
c. capacity
d. memory ratio - ✔✔unit of transfer
"Memory is organized into records and access must be made in a specific linear sequence" is
a description of __________.
a. sequential access
b. direct access
c. random access
d. associative - ✔✔sequential access
individual blocks or records have a unique address based on physical location with __________.
a. associative
b. physical access
c. direct access
d. sequential access - ✔✔direct access
, For random-access memory, __________ is the time from the instant that an address is
presented to the memory to the instant that data have been stored or made available for use.
a. memory cycle time
b. direct access
c. transfer rate
d. access time - ✔✔access time
The ________ consists of the access time plus any additional time required before a second
access can commence.
a. latency
b. memory cycle time
c. direct access
d. transfer rate - ✔✔memory cycle time
A portion of main memory used as a buffer to hold data temporarily that is to be read out
to disk is referred to as a _________.
a. disk cache
b. latency
c. virtual address
d. miss - ✔✔disk cache
A line includes a _________ that identifies which particular block is currently being stored.
a. cache
b. hit
c. tag
d. locality - ✔✔tag