WGU 952 - Computer Architecture Questions With Complete Solutions.

AND operator - A logical bit- by-bit operation with two operands that calculates a 1 only if there is a 1 in both operands. OR operator - A logical bit-by-bit operation with two operands that calculates a 1 if there is a 1 in either operand. LDUR - Load into register instruction LDUR X9, [X22,#64] = load value at X22[64] into X9 STUR - store into register instruction STUR X9, [X22, #64] = store the value of X9 into X22[64] ADD - addition instruction ADD X9, X5, X6 = store into X9 the sum of the values in X5 ad X6 ADDI - add immediate instruction ADDI X9, X5, 64 store into X9 the sum of the value in X5 and constant 40 ADDIS, SUBIS, - immediate arithmetic, and sets condition codesADDI, SUBI - immediate arithmetic with a register and a constant LSL, LSR - logical shift left /right LSL X1, X2, 10 -- X1 = X2 10 -- X1 = X2 10 CBZ, CBNZ - compare and branch on (not) equal 0 CBZ X1, 25 -- if (X1 == 0): -- go to PC + 4 + 100 B address - branch to target address B.cond - Test condition codes; if true, branch B.GE 25 Least significant bit - The rightmost bit in an LEGv8 doubleword. Most significant bit - The leftmost bit in an LEGv8 doubleword. two's complement - A signed number representation where a leading 0 indicates a positive number and a leading 1 indicates a negative number. The complement of a value is obtained by complementing each bit (0 → 1 or 1 → 0), and then adding one to the result (explained further below).overflow - error that results when the number of bits is not enough to hold the number, like a car's odometer "rolling over" First 2 steps in a LEGv8 instruction - 1. Retrieve the operation from memory 2. Read the required registers Conditional Element - An operational element, such as an AND gate or an ALU. Elements that operate on data values are all combinational, which means that their outputs depend only on the current inputs. Given the same input, a combinational element always produces the same output State Elements - A memory element, such as a register or a memory. Contains state and has internal storage clocking methodology - The approach used to determine when data is valid and stable relative to the clock. edge-triggered clocking - A clocking scheme in which all state changes occur on a clock edge