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Summary

Summary Grade 11 IEB - Information Technology Sumary

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Summaries for Grade 11 IT IEB theory according to the SAGS document

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L.lt 2 .
:
Hardware

CPU
Design
Control Unit ( CU )
Controls execution of each instruction .



using the system dock .




↳ Data fetched from stored CU ALU
registers
in
memory
or




Arithmetic Unit CALU)
Logic
Does calculations and
logical comparisons
↳ Stored in accumulator




Registers
store current instructions and its data
↳
Registers are static RAM ( SRAM)
fast
Very
↳


Serial
Processing
Processing 7 instruction at a time .




Parallel Processing
Breaking up and
running instructions on
multiple microprocessors

↳ Allowed
Hyperthreading :
processor Go
sets of instructions
appear
to execute 2

simultaneously
↳ CPU
.




appears
like 2
logical CPU's


Multiprocessing Having :

multiple cores on
single CPU

↳ 2
physical cores
hyperthreaded into 4
logical cores




Processor Cache
Stores data thatso future requests can be served faster
↳ SRAM


Cache Memory Levels :




7. Ll chip same speed :
as CPU internal speed
Small amount
memory
of

2. L2 chip :
Smaller than 11 ; Half the speed
Cache located on CPU
3. 13 chip :
larger and slower
On motherboard



CPU checks 11 then 12 then 13 then RAM

,RAM

-

Stores currently used t data
programs
-
Most common RAM :
Double Data Rate (DDR) SDRAM

DRAM RAM
Dynamic
- -



-




SDRAM
Synchronous DRAM
- :




Latency
Time taken for component to
respond



Types of
Memory
7 .




Registers
2 .
On chip cache
3 .
Off chip cache

4 Main
memory
.




Local
storage
5 .




secondary
b. Remote
secondary storage


Motherboard

Connects components devices
together
-

t




System Clock
Microchip that
regulates timing t
speed of
computer functions


Overclocking
Achieved
by : •



Increasing system clock Per Component :
CPU
changes own clock
•
Increase clock multiplication factor
Whole
↳ AKA Clock Multiplication
System System clock is
changes
:
.




Speed us .



Throughput
Speed : Bandwidth theoretical speed of data
-




Throughput : Actual data speed .




Front side Bus / Internal Bus
CPU and RAM
FBS
Usually connect
:




Data Bus
Transfer info or data between CPU and RAM


Control Bus
Carries commands between CPU and RAM

, External Busses
To attach external devices


↳ PCIe Connect
:
GPU ; RAID card ; Wifi card i SSD

SATA Connect
:
mass
storage device to motherboard

Serial Advanced Technology Attachment
USB :
Standardise connection of peripherals
NV Me :
Non Volatile
Memory Express : connect SSD to motherboard

M 2.
:
Increase SSD speed ,
decrease size




Other of
types Caching
Caching technique nob limited to CPU


Disk Cache
Hardware mechanism to improve read Iwrite speeds Go HD
↳ Stored in RAM


Browser Cache
When website is accessed ,
copy
of site s bored in browser cache
↳ Stored on HDD

Website will load faster after saved .




Web Cache
Stores accessed web network
recently
in
pages on a server a

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Uploaded on
October 4, 2024
Number of pages
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Written in
2023/2024
Type
Summary
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