WGU C952 Computer Architecture Pre-Assessment Exam Terms Explained Correctly

WGU C952 Computer Architecture Pre-Assessment Exam Terms Explained Correctly WGU C952 Computer Architecture Pre-Assessment Exam Terms Explained Correctly Response time << correct answer >> Also known asExecution Time. The total time required for the computer to complete a task, including disk accesses, memory accesses, I/O activities, operating system overhead, CPU execution time, and so on. Execution time << correct answer >> Also known as Response Time. The total time required for the computer to complete a task, including disk accesses, memory accesses, I/O activities, operating system overhead, CPU execution time, and so on. Throughput << correct answer >> Also know as Bandwidth. The number of tasks completed per unit time. Bandwidth << correct answer >> Also known as Throughput. The number of tasks completed per unit time. CPU execution time << correct answer >> The actual time the CPU spends computing for a specific task. User CPU time << correct answer >> The CPU time spent in a program itself. System CPU time << correct answer >> The CPU time spent in the operating system performing tasks on behalf of the program. System performance << correct answer >> The overall capability and efficiency of a computer system in carrying out various tasks and workloads. CPU performance << correct answer >> The measurement of a computer's processor's ability to execute tasks and processes effectively and efficiently. clock rate << correct answer >> The time for one clock period, usually of the processor clock, which runs at a constant rate. clock period << correct answer >> The length of each clock cycle. CPI << correct answer >> Average number of clock cycles per instruction for a program or program fragment. instruction count << correct answer >> The number of instructions executed by the program. instruction mix << correct answer >> A measure of the dynamic frequency of instructions across one or many programs. IPC << correct answer >> A metric used to measure the efficiency and performance of a computer's central processing unit. The opposite of CPI. fields << correct answer >> A machine instruction is composed of fields, each field having several bits and representing some part of the instruction. instruction format << correct answer >> A form of representation of an instruction composed of fields of binary numbers machine language << correct answer >> Binary representation used for communication within a computer system. hexadecimal << correct answer >> Numbers in base 16. opcode << correct answer >> The field that denotes the operation and format of an instruction. destination register << correct answer >> A register that receives the result of an operation stored program concept << correct answer >> Programs are stored in memory along with data scientific notation << correct answer >> A notation that renders numbers with a single digit to the left of the decimal point. normalized << correct answer >> A number in floating-point notation that has no leading 0s. floating point << correct answer >> Computer arithmetic that represents numbers in which the binary point is not fixed. fraction << correct answer >> The value, generally between 0 and 1, placed in the fraction field. The fraction is also called the mantissa. exponent << correct answer >> In the numerical representation system of floating-point arithmetic, the value that is placed in the exponent field. floating point representation << correct answer >> A method used in computer systems to store and manipulate real numbers overflow << correct answer >> A situation in which a positive exponent becomes too large to fit in the exponent field. underflow << correct answer >> A situation in which a negative exponent becomes too large to fit in the exponent field. single precision << correct answer >> A floating-point value represented in a 32-bit word. double precision << correct answer >> A floating-point value represented in a 64-bit doubleword. exception << correct answer >> Also known as an interrupt. An unscheduled event that disrupts program execution; used to detect overflow. interrupt << correct answer >> Also known as an exception. An unscheduled event that disrupts program execution; used to detect overflow. NaN << correct answer >> Not a Number. the result of invalid operations Floating point instructions in ARM << correct answer >> A set of instructions specifically designed to perform arithmetic and data manipulation operations on floating-point numbers pipelined << correct answer >> A technique for executing multiple instructions in a sequential and overlapping manner, where different stages of instruction execution are carried out simultaneously. load register instruction << correct answer >> A type of machine-level instruction in computer architecture that is used to transfer data from memory into a processor register. store register instruction << correct answer >> A type of machine-level instruction in computer architecture used to transfer data from a processor register into a specified memory location. compare and branch on zero instruction << correct answer >> Used to compare two values and, based on the result of the comparison, conditionally branch to a different instruction location in the program. branch instruction << correct answer >> A type of machine-level instruction used to alter the flow of program execution by transferring control to a different instruction or memory location. program counter << correct answer >> A special-purpose register that plays a crucial role in the execution of computer programs. Its primary function is to keep track of the memory address of the next instruction to be fetched and executed. ALU << correct answer >> Responsible for performing arithmetic and logical operations on data, making it a crucial part of the CPU's execution unit. MUX << correct answer >> A digital electronic device or circuit that plays a fundamental role in data routing and selection within digital systems. It allows multiple input data sources to be selectively connected to a single output line, based on control signals. combinational element << correct answer >> An operational element, such as an AND gate or an ALU. state element << correct answer >> A memory element, such as a register or a memory. clocking methodology << correct answer >> The approach used to determine when data is valid and stable relative to the clock. edge-triggered clocking << correct answer >> A clocking scheme in which all state changes occur on a clock edge. control signal << correct answer >> A signal used for multiplexor selection or for directing the operation of a functional unit; contrasts with a data signal, which contains information that is operated on by a functional unit. asserted << correct answer >> The signal is logically high or true. deasserted << correct answer >> The signal is logically low or false. datapath element << correct answer >> A unit used to operate on or hold data within a processor. In the LEGv8 implementation, the datapath elements include the instruction and data memories, the register file, the ALU, and adders. PC << correct answer >> The register containing the address of the instruction in the program being executed. register file << correct answer >> A state element that consists of a set of registers that can be read and written by supplying a register number to be accessed. sign extend << correct answer >> To increase the size of a data item by replicating the high-order sign bit of the original data item in the high-order bits of the larger, destination data item. branch target address << correct answer >> The address specified in a branch, which becomes the new program counter if the branch is taken. In the LEGv8 architecture, the branch target is given by the sum of the offset field of the instruction and the address of the branch. branch taken << correct answer >> A branch where the branch condition is satisfied and the program counter becomes the branch target. All unconditional branches are taken branches. branch not taken << correct answer >> A branch where the branch condition is false and the program counter becomes the address of the instruction that sequentially follows the branch. truth table << correct answer >> From logic, a representation of a logical operation by listing all the values of the inputs and then in each case showing what the resulting outputs should be. don't care term << correct answer >> An element of a logical function in which the output does not depend on the values of all the inputs. Don't-care terms may be specified in different ways. single cycle implementation << correct answer >> An implementation in which an instruction is executed in one clock cycle. While easy to understand, it is too slow to be practical. pipelining << correct answer >> An implementation technique in which multiple instructions are overlapped in execution, much like an assembly line. structural hazard << correct answer >> When a planned instruction cannot execute in the proper clock cycle because the hardware does not support the combination of instructions that are set to execute. data hazard << correct answer >> When a planned instruction cannot execute in the proper clock cycle because data that is needed to execute the instruction is not yet available. forwarding << correct answer >> A method of resolving a data hazard by retrieving the missing data element from internal buffers rather than waiting for it to arrive from programmer-visible registers or memory. load use data hazard << correct answer >> A specific form of data hazard in which the data being loaded by a load instruction has not yet become available when it is needed by another instruction. pipeline stall << correct answer >> A stall initiated in order to resolve a hazard. control hazard << correct answer >> When the proper instruction cannot execute in the proper pipeline clock cycle because the instruction that was fetched is not the one that is needed; that is, the flow of instruction addresses is not what the pipeline expected. branch prediction << correct answer >> A method of resolving a branch hazard that assumes a given outcome for the conditional branch and proceeds from that assumption rather than waiting to ascertain the actual outcome. latency << correct answer >> The number of stages in a pipeline or the number of stages between two instructions during execution. temporal locality << correct answer >> The locality principle stating that if a data location is referenced then it will tend to be referenced again soon. spatial locality << correct answer >> The locality principle stating that if a data location is referenced, data locations with nearby addresses will tend to be referenced soon. memory hierarchy << correct answer >> A structure that uses multiple levels of memories; as the distance from the processor increases, the size of the memories and the access time both increase. block << correct answer >> The minimum unit of information that can be either present or not present in a cache. hit rate << correct answer >> The fraction of memory accesses found in a level of the memory hierarchy. It measures the effectiveness of a cache in serving data or requests by indicating the percentage of requests that are successfully retrieved from the cache without the need to access the original data source. miss rate << correct answer >> The fraction of memory accesses not found in a level of the memory hierarchy. It quantifies the frequency with which the cache fails to find the requested data, resulting in a cache miss. hit time << correct answer >> The time required to access a level of the memory hierarchy, including the time needed to determine whether the access is a hit or a miss. It refers to the time it takes to access data or retrieve a requested item from the cache when a cache hit occurs. A cache hit is when the requested data is found in the cache, and the system can quickly retrieve the data without having to access the slower primary data source. miss penalty << correct answer >> The time required to fetch a block into a level of the memory hierarchy from the lower level, including the time to access the block, transmit it from one level to the other, insert it in the level that experienced the miss, and then pass the block to the requestor. It refers to the delay or time cost incurred when a cache miss occurs. A cache miss happens when the requested data is not found in the cache, and the system needs to fetch the data from a slower primary storage location, such as main memory, disk, or a remote server. SRAM technology << correct answer >> A type of semiconductor memory technology used in digital electronics and computer systems. It is favored for its speed and low latency, making it ideal for cache memory. It is less dense than DRAM because it uses more components (transistors) to store each bit. DRAM technology << correct answer >> A type of semiconductor memory technology commonly used in computers, digital devices, and electronic systems for storing and accessing data. Its cost-effectiveness and high capacity make it suitable for main memory in most computers and electronic devices. It is more memory-efficient in terms of density because it stores each bit with a single capacitor and transistor. flash memory << correct answer >> A type of non-volatile computer storage medium that retains data even when the power supply is disconnected. disk memory << correct answer >> A hard disk drive is a non-volatile storage device that uses rotating disks or platters to store and retrieve data. track << correct answer >> One of thousands of concentric circles that make up the surface of a magnetic disk. sector << correct answer >> One of the segments that make up a track on a magnetic disk; a sector is the smallest amount of information that is read or written on a disk. seek << correct answer >> The process of positioning a read/write head over the proper track on a disk. rotational latency << correct answer >> The time required for the desired sector of a disk to rotate under the read/write head; usually assumed to be half the rotation time. direct mapped cache << correct answer >> A cache structure in which each memory location is mapped to exactly one location in the cache. tag << correct answer >> A field in a table used for a memory hierarchy that contains the address information required to identify whether the associated block in the hierarchy corresponds to a requested word. valid bit << correct answer >> A field in the tables of a memory hierarchy that indicates that the associated block in the hierarchy contains valid data. write through << correct answer >> A scheme in which writes always update both the cache and the next lower level of the memory hierarchy, ensuring that data are always consistent between the two. write buffer << correct answer >> A queue that holds data while the data are waiting to be written to memory. write-back << correct answer >> A scheme that handles writes by updating values only to the block in the cache, then writing the modified block to the lower level of the hierarchy when the block is replaced. split cache << correct answer >> A scheme in which a level of the memory hierarchy is composed of two independent caches that operate in parallel with each other, with one handling instructions and one handling data. AMAT << correct answer >> Average memory access time: A performance metric used in computer architecture and system design to evaluate the average time it takes to access data from a computer's memory system. fully associative cache << correct answer >> A cache structure in which a block can be placed in any location in the cache. set associative cache << correct answer >> A cache that has a fixed number of locations (at least two) where each block can be placed. LRU << correct answer >> A replacement scheme in which the block replaced is the one that has been unused for the longest time. multilevel cache << correct answer >> A memory hierarchy with multiple levels of caches, rather than just a cache and main memory. global miss rate << correct answer >> The fraction of references that miss in all levels of a multilevel cache. It is the ratio of cache misses to the total number of cache accesses or requests made across the entire system. local miss rate << correct answer >> The fraction of references to one level of a cache that miss; used in multilevel hierarchies. The ratio of cache misses to the total number of cache accesses or requests made to that cache. dependability << correct answer >> The importance of dependability in computer memory systems. It highlights that the memory hierarchy should be reliable and not prone to data loss. MTTR (mean time to repair) << correct answer >> Mean time to repair: A metric used in reliability and maintenance analysis to measure the average time it takes to repair a system or component after it has experienced a failure or malfunction. MTBF (Mean Time Between Failures) << correct answer >> A measure of the average time between failures in a system - the higher the amount, the more reliable the thing is. MTTF (mean time to failure) << correct answer >> The average time a device or component is expected to be in operation. Annual Failure Rate << correct answer >> A reliability metric used to estimate the likelihood or probability of a system, component, or device experiencing a failure within a one-year time frame. AFR is an important measure in reliability engineering and is often used to assess and communicate the reliability of products, systems, and components over extended periods. Fault avoidance << correct answer >> Very careful development methods to reduce the number of faults introduced in the first place Fault forecasting << correct answer >> predicting the presence and creation of faults allowing the component to be replaced before it fails Error Detection Code << correct answer >> A code that enables the detection of an error in data, but not the precise location and, hence, correction of the error. virtual machine (VM) << correct answer >> Software that simulates the hardware of a physical computer, creating one or more logical machines within one physical machine. Virtual Machine Monitor << correct answer >> A hypervisor, is a software or hardware component that manages and controls the execution of VMs on a physical host machine. Its primary role is to create, allocate resources to, and oversee the operation of multiple VMs, each of which behaves like an independent and isolated computer with its own operating system and applications. The VMM abstracts and virtualizes the host's hardware resources, enabling multiple VMs to share those resources without interference. Hypervisor << correct answer >> Software that enables a single computer to run multiple operating systems simultaneously. Host Machine << correct answer >> Another name for a physical machine or virtual host Guest VM << correct answer >> A virtualized computing environment created and managed by a hypervisor or virtualization software on a host machine. The guest VM is a self-contained, isolated instance that operates as an independent virtual computer with its own operating system, applications, and data. These VMs share the physical hardware and resources of the host machine but are kept separate from each other, providing a secure and isolated environment for running multiple operating systems and workloads on a single host. I/O bound << correct answer >> A situation in which a computer system's overall performance is limited or constrained by the speed at which it can read from or write to input and output (I/O) devices, such as hard drives, solid-state drives, network interfaces, or external storage. RAID << correct answer >> A technology used in data storage to enhance data redundancy, availability, and performance. RAID achieves these objectives by combining multiple physical hard drives into a single logical unit, allowing for various data storage techniques. RAID 0 << correct answer >> This level offers improved performance by distributing data across multiple drives. However, it provides no redundancy, so if one drive fails, all data is lost. RAID 1 << correct answer >> In RAID 1, data is duplicated across two drives. This provides excellent data redundancy, but it effectively halves the total storage capacity. Mirroring << correct answer >> A data storage technique used for redundancy and fault tolerance. It involves creating an identical duplicate (mirror) of data on two or more hard drives, ensuring that if one drive fails, the data remains accessible from the mirror. Mirroring is often associated with RAID 1, one of the most straightforward and effective RAID levels. RAID 2 << correct answer >> RAID 2 uses bit-level striping, meaning that data is divided into individual bits and distributed across multiple data disks. Each bit is stored on a different disk. RAID 3 << correct answer >> RAID 3 uses byte-level striping, where data is divided into bytes and distributed across data disks. A dedicated parity disk is used to store parity information, which is used for error detection and recovery. All data disks operate in perfect synchronization. RAID 4 << correct answer >> RAID 4 is similar to RAID 3 but uses block-level striping instead of byte-level striping. Data is divided into blocks, and a dedicated parity disk is used to store parity information. This provides better performance for read operations because multiple disks can be read simultaneously. RAID 5 << correct answer >> RAID 5 combines striping and parity data across multiple drives. This level offers both increased performance and data redundancy, with the ability to recover data if one drive fails. RAID 6 << correct answer >> Similar to RAID 5 but with an additional level of redundancy. RAID 6 can withstand the failure of two drives, making it more fault-tolerant. Protection Group << correct answer >> A collection of drives or storage devices within a RAID configuration that work together to provide data protection and fault tolerance. The primary purpose of a protection group is to ensure that data remains available and intact, even in the event of a drive failure. Hot Swapping << correct answer >> Hot swapping, also known as hot-plugging, refers to the capability of replacing or adding hardware components while the system is running or "hot," without the need to shut down or reboot the entire system. Standby Spares << correct answer >> Standby spares, also known as hot standby or cold standby, involve having redundant components or systems ready to take over in the event of a failure. These components or systems are kept in a state of readiness but are not actively operating until needed. MIMD << correct answer >> A multiprocessor. SISD << correct answer >> A uniprocessor. Data-Level Parallelism << correct answer >> Parallelism achieved by performing the same operation on independent data Vector << correct answer >> A fundamental mathematical object that represents both magnitude and direction. Vectors are used to describe quantities that have both a numerical value (magnitude) and a specific orientation in space (direction). Vectors can be represented in various dimensions, including one-dimensional (scalar), two-dimensional, three-dimensional, and even higher dimensions. Pipelined Execution Units << correct answer >> Components within a processor's instruction execution pipeline. A processor's instruction pipeline is a sequence of stages that instructions pass through during their execution. Each pipeline stage is responsible for performing a specific operation on an instruction or part of an instruction. The purpose of a pipeline is to improve the overall throughput and efficiency of instruction execution in a processor. Vector vs. Scalar << correct answer >> Vectors have magnitude and direction Scalars solely have magnitude Vector Lane << correct answer >> One or more vector functional units and a portion of the vector register file. Inspired by lanes on highways that increase traffic speed, multiple lanes execute vector operations simultaneously. Verilog << correct answer >> A hardware description language (HDL) that is used for modeling and simulating digital electronic systems, particularly integrated circuits and field-programmable gate arrays. It is widely used in the design, verification, and synthesis of digital circuits, making it a fundamental tool in digital design and electronic engineering. NOP << correct answer >> An instruction that does no operation to change state Flush << correct answer >> To discard instructions in a pipeline, usually due to an unexpected event Correlating predictor << correct answer >> A branch predictor that combines local behavior of a particular branch and global information about the behavior of some recent number of executed branches. Tournament branch predictor << correct answer >> A branch predictor with multiple predictions for each branch and a selection mechanism that chooses which predictor to enable for a given branch. vectored interrupt << correct answer >> An interrupt for which the address to which control is transferred is determined by the cause of the exception. Imprecise interrupt << correct answer >> Also called imprecise exception. Interrupts or exceptions in pipelined computers that are not associated with the exact instruction that was the cause of the interrupt or exception. Precise interrupt << correct answer >> Also called precise exception. An interrupt or exception that is always associated with the correct instruction in pipelined computers. Multiple Issue << correct answer >> A scheme whereby multiple instructions are launched in one clock cycle. static multiple issue << correct answer >> An approach to implementing a multiple-issue processor where many decisions are made by the compiler before execution. Dynamic multiple issue << correct answer >> An approach to implementing a multiple-issue processor where many decisions are made during execution by the processor. issue slots << correct answer >> The positions from which instructions could issue in a given clock cycle; by analogy, these correspond to positions at the starting blocks for a sprint. speculation << correct answer >> An approach whereby the compiler or processor guesses the outcome of an instruction to remove it as a dependence in executing other instructions issue packet << correct answer >> The set of instructions that issues together in one clock cycle; the packet may be determined statically by the compiler or dynamically by the processor. VLIW (Very Long Instruction Word) << correct answer >> A style of instruction set architecture that launches many operations that are de need to be independent in a single wide instruction, typically with may separate opcode fields. Use latency << correct answer >> Number of clock cycles between a load instruction and an instruction that can use the result of the load without stalling the pipeline. loop unrolling << correct answer >> A technique to get more performance from loops that access arrays, in which multiple copies of the loop body are made and instructions from different iterations are scheduled together. register renaming << correct answer >> The renaming of registers by the compiler or hardware to remove antidependences. antidependence (name dependence) << correct answer >> An ordering forced by the reuse of a name, typically a register, rather than by a true dependence that carries a value between two instructions. Superscalar << correct answer >> An advanced pipelining technique that enables the processor to execute more than one instruction per clock cycle by selecting them during execution Dynamic pipeline scheduling << correct answer >> Hardware support for reordering the order of instruction execution so as to avoid stalls. commit unit << correct answer >> The unit in a dynamic or out-of-order execution pipeline that decides when it is safe to release the result of an operation to programmer-visible registers and memory. reservation station << correct answer >> A buffer within a functional unit that holds the operands and the operation. out-of-order execution << correct answer >> A situation in pipelined execution when an instruction blocked from executing does not cause the following instructions to wait. in-order commit << correct answer >> A commit in which the results of pipelined execution are written to the programmer-visible state in the same order that instructions are fetched. Microarchitecture << correct answer >> The organization of the processor, including the major functional units, their interconnection, and control. Architectural Registers << correct answer >> The instruction set of visible registers of a processor; for example, in LEGv8, these are the 32 integer and 32 floating-point registers instruction latency << correct answer >> The inherent execution time for an instruction. Virtual Memory << correct answer >> A technique that uses main memory as a "cache" for secondary storage physical address << correct answer >> An address in the main memory page fault << correct answer >> An event that occurs when an accessed page is not present in main memory. virtual address << correct answer >> An address that corresponds to a location in virtual space and is translated by address mapping to a physical address when memory is accessed. address translation (address mapping) << correct answer >> the process by which a virtual address is mapped to an address used to access memory Segmentation << correct answer >> A variable-size address mapping scheme in which an address consists of two parts: a segment number, which is mapped to a physical address, and a segment offset page table << correct answer >> The table containing the virtual to physical address translations in a virtual memory system. The table, which is stored in memory, is typically indexed by the virtual page number; each entry in the table contains the physical page number for that virtual page if the page is currently in memory. swap space << correct answer >> The space on the disk reserved for the full virtual memory space of a process. Reference Bit (Use Bit or Access Bit) << correct answer >> A field that is set whenever a page is accessed and that is used to implement LRU or other replacement schemes. ARMv8 calls it an access bit Translation Lookaside Buffer (TLB) << correct answer >> A cache that keeps track of recently used address mappings to try to avoid an access to the page table. virtually addressed cache << correct answer >> A cache that is accessed with a virtual address rather than a physical address. Aliasing << correct answer >> A situation in which two addresses access the same object; it can occur in virtual memory when there are two virtual addresses for the same physical page Physically addressed cache << correct answer >> A cache that is addressed by a physical address. supervisor mode << correct answer >> Also called kernel mode. A mode indicating that a running process is an operating system process. System Call << correct answer >> A special instruction that transfers control from user mode to a dedicated location in supervisor code space, invoking the exception mechanism in the process. Context Switch << correct answer >> A changing of the internal state of the processor to allow a different process to use the processor that includes saving the state needed to return to the currently executing process. Exception Enable (Interrupt Enable) << correct answer >> A signal or action that controls whether the process responds to an exception or not; necessary for preventing the occurrence of exceptions during intervals before the processor has safely saved the state needed for restart. Restartable instruction << correct answer >> An instruction that can resume execution after an exception is resolved without the exception's affecting the result of the instruction. Three C's Model << correct answer >> A cache model in which all cache misses are classified into one of three categories: compulsory misses, capacity misses, and conflict misses compulsory miss (cold-start miss) << correct answer >> a cache miss caused by the first access to a block that has never been in the cache Both large block sizes and prefetching may reduce compulsory misses capacity miss << correct answer >> A cache miss that occurs because the cache, even with full associativity, cannot contain all the blocks needed to satisfy the request. conflict miss (collision miss) << correct answer >> A cache miss that occurs in a set-associative or direct-mapped cache when multiple blocks compete for the same set and that are eliminated in a fully associative cache of the same size Increases associativity may decrease miss rate and increase access time. Finite State Machine << correct answer >> A sequential logic function consisting of a set of inputs and outputs, a next-state function that maps the current state and the inputs to a new state, and an output function that maps the current state and possibly the inputs to a set of asserted outputs. Next-state machine << correct answer >> A combinational function that, given the inputs and the current state, determines the next state of a finite-state machine. false sharing << correct answer >> When two unrelated shared variables are located in the same cache block and the full block is exchanged between processors even though the processors are accessing different variables. Striping << correct answer >> Allocation of logically sequential blocks to separate disks to allow higher performance than a single disk can deliver nonblocking cache << correct answer >> A cache that allows the processor to make references to the cache while the cache is handling an earlier miss. Prefetching << correct answer >> A technique in which data blocks needed in the future are brought into the cache early by the use of special instructions that specify the address of the block. mathematical model << correct answer >> A mathematical model is an equation used to represent data Variable << correct answer >> A variable is a symbol representing data. Ex: T is a common variable representing temperature independent variable << correct answer >> An independent variable is a symbol representing an input. Ex: x is a common independent variable. A simple way to remember independent variables are for input is 'I' for independent ad input[c]. dependent variable << correct answer >> A dependent variable is a symbol representing an output. Ex: y is a common dependent variable Multiprocessor << correct answer >> A computer system with at least two processors. This computer is in contrast to a uniprocessor, which has one, and is increasingly hard to find today. task-level parallelism (process-level parallelism) << correct answer >> Utilizing multiple processors by running independent programs simultaneously. Parallel Processing Program << correct answer >> A single program that runs on multiple processors simultaneously Cluster << correct answer >> A set of computers connected over a local area network that function as a single large multiprocessor. Multicore multiprocessor << correct answer >> A microprocessor containing multiple processors ("cores") in a single integrated circuit. Shared memory multiprocessor (SMP) << correct answer >> A parallel processor with a single physical address space. Strong scaling << correct answer >> Speed-up achieved on a multiprocessor without increasing the size of the problem. Weak scaling << correct answer >> Speed-up achieved on a multiprocessor while increasing the size of the problem proportionally to the increase in the number of processors. SPMD or single program, multiple data streams << correct answer >> The conventional MIMD programming model, where a single program runs across all processors. SIMD (single instruction, multiple data) << correct answer >> The same instruction is applied to may data streams, as in a vector processor Data-level parallelism << correct answer >> Parallelism achieved by performing the same operation on independent data Hardware Multithreading << correct answer >> Increasing utilization of a processor by switching to another thread when one thread is stalled. thread << correct answer >> A thread includes the program counter, the register state, and the stack. It is a lightweight process; whereas threads commonly share a single address space, processes don't Process << correct answer >> A process includes one or more threads, the address space, and the operating system state. Hence, a process switch usually invokes the operating system, but not a thread switch Fine-grained multithreading << correct answer >> A version of hardware multithreading that implies switching between threads after every instruction. Coarse-Grained Multithreading << correct answer >> A version of hardware multithreading that implies switching between threads only after significant events, such as a last-level cache miss simultaneous multithreading (SMT) << correct answer >> A version of multithreading that lowers the cost of multithreading by utilizing the resources needed for multiple issue, dynamically scheduled microarchitecture. Uniform Memory Access (UMA) << correct answer >> A multiprocessor in which latency to any word in main memory is about the same no matter which processor requests the access. Nonuniform Memory Access (NUMA) << correct answer >> A type of single address space multiprocessor in which some memory accesses are much faster than others depending on which processor asks for which word. Synchronization << correct answer >> The process of coordinating the behavior of two or more processes, which may be running on different processors. Lock << correct answer >> A synchronization device that allows access to data to only one processor at a time Reduction << correct answer >> A function that processes a data structure and returns a single value OpenMP << correct answer >> An API for shared memory multiprocessing in C, C++, or Fortran that runs on UNIX and Microsoft platforms. It includes compiler directives, a library, and runtime directives. Message Passing << correct answer >> Communicating between multiple processors by explicitly sending and receiving information. Send message routine << correct answer >> A routine used by a processor in machines with private memories to pass a message to another processor. Receive Message Routine << correct answer >> A routine used by a processor in machines with private memories to accept a message from another processor. Software as a Service (SaaS) << correct answer >> Rather than selling software that is installed and run on customers' own computers, the software is run at a remote site and made available over the Internet typically via a Web interface to customers. SaaS customers are charged based on use versus ownership. Network bandwidth << correct answer >> Informally, the peak transfer rate of a network; can refer to the speed of a single link or the collective transfer rate of all links in the network. Bisection bandwidth << correct answer >> The bandwidth between two equal parts of a multiprocessor. This measure is for a worst case split of the multiprocessor. Fully Connected Network << correct answer >> A network that connects processor-memory nodes by supplying a dedicated communication link between every node. Multistage << correct answer >> A network that supplies a small switch at each node. Crossbar network << correct answer >> A network that allows any node to communicate with any other node in one pass through the network. Memory-mapped I/O << correct answer >> An I/O scheme in which portions of the address space are assigned to I/O devices, and reads and writes to those addresses are interpreted as commands to the I/O device. Direct Memory Access (DMA) << correct answer >> A mechanism that provides a device controller with the ability t transfer data directly to or from the memory without involving the processor Interrupt-driven I/O << correct answer >> An I/O scheme that employs interrupts to indicate to the processor that an I/O device needs attention. device driver << correct answer >> A program that controls an I/O device that is attached to the computer Polling << correct answer >> The process of periodically checking the status of an I/O device to determine the need to service the device. Pthreads << correct answer >> A UNIX API for creating and manipulating threads. It is structured as a library. Arithmetic intensity << correct answer >> The ratio of floating-point operations in a program to the number of data bytes accessed by a program from main memory. Personal Computer (PC) << correct answer >> computer designed for general use by a single person Server << correct answer >> A computer used for running larger programs for multiple users, often simultaneously, and typically accessed only via a network. supercomputer << correct answer >> A class of computers with the highest performance and cost; they are configured as servers and typically cost tens to hundreds of millions of dollars. embedded computer << correct answer >> A computer inside another device used for running one predetermined application or collection of software. Personal mobile devices (PMDs) << correct answer >> are small wireless devices to connect to the Internet; they rely on batteries for power, and software is installed by downloading apps. Conventional examples are smart phones and tablets. Cloud Computing << correct answer >> refers to large collections of servers that provide services over the Internet; some providers rent dynamically varying numbers of servers as a utility. Moore's Law << correct answer >> States that integrated circuit resources double every 18-24 months. Abstraction << correct answer >> A simplified representation of something more complex. Abstractions allow you to hide details to help you manage complexity, focus on relevant concepts, and reason about problems at a higher level. To characterize the design at different levels of representation; lower-level details are hidden to offer a simpler model at higher levels. System Software << correct answer >> Software that provides services that are commonly useful, including operating systems, compilers, loaders, and assemblers. Operating Software << correct answer >> Supervising program that manages the resources of a computer for the benefit of the programs that run on that computer. Compiler << correct answer >> A program that translates high-level language statements into assembly language statements. binary digit (bit) << correct answer >> One of the two numbers in base 2 (0 or 1) that are the components of information. instruction << correct answer >> A command that computer hardware understands and obeys. Assembler << correct answer >> A program that translates a symbolic version of instructions into the binary version. Assembly Language << correct answer >> A symbolic representation of machine instructions. input device << correct answer >> A mechanism through which the computer is fed information, such as a keyboard. output device << correct answer >> A mechanism that conveys the result of a computation to a user, such as a display, or to another computer. liquid crystal display (LCD) << correct answer >> A display technology using a thin layer of liquid polymers that can be used to transmit or block light according to whether a charge is applied. active matrix display << correct answer >> A liquid crystal display using a transistor to control the transmission of light at each individual pixel. Pixel << correct answer >> Short for "picture element" is the fundamental unit of a digital image, typically a tiny square or dot containing a single point of color of a larger image. The smallest individual picture element. Screens are composed of hundreds of thousands to millions of pixels, organized in a matrix. integrated circuit (chip) << correct answer >> A device combining dozens to millions of transistors. Central Processing Unit (CPU) << correct answer >> The active part of the computer, which contains the datapath and control and which adds numbers, tests numbers, signals I/O devices to activate, and so on. Datapath << correct answer >> The component of the processor that performs arithmetic operations Control << correct answer >> The component of the processor that commands the datapath, memory, and I/O devices according to the instructions of the program. memory << correct answer >> The storage area in which programs are kept when they are running and that contains the data needed by the running programs. Cache << correct answer >> A small, fast memory that acts as a buffer for a slower, larger memory. Instruction Set Architecture (ISA) << correct answer >> An abstract interface between the hardware and the lowest-level software that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, I/O, and so on. Application Binary Interface (ABI) << correct answer >> The user portion of the instruction set plus the operating system interfaces used by application programmers. It defines a standard for binary portability across computers. Main Memory << correct answer >> Memory used to hold programs while they are running; typically consists of DRAM in today's computers. Also called Primary Memory Secondary Memory << correct answer >> Nonvolatile memory used to store programs and data between runs; typically consists of flash memory in PMDs and magnetic disks in servers. Local Area Network (LAN) << correct answer >> A network designed to carry data within a geographically confined area, typically within a single building. Wide Area Network (WAN) << correct answer >> A network extended over hundreds of kilometers that can span a continent. Silicon << correct answer >> A natural element that is a semiconductor. semiconductor << correct answer >> A substance that does not conduct electricity well. silicon crystal ingot << correct answer >> A rod composed of a silicon crystal that is between 8 and 12 inches in diameter and about 12 to 24 inches long. wafer << correct answer >> A slice from a silicon ingot no more than 0.1 inches thick, used to create chips. defect << correct answer >> A microscopic flaw in a wafer or in patterning steps that can result in the failure of the die containing that defect. Die << correct answer >> The individual rectangular sections that are cut from a wafer, more informally known as chips. Yield << correct answer >> The percentage of good dies from the total number of dies on the wafer. Amdahl's Law << correct answer >> A rule stating that the performance enhancement possible with a given improvement is limited by the amount that the improved feature is used. It is a quantitative version of the law of diminishing returns. million instructions per second (MIPS) << correct answer >> A measurement of program execution speed based on the number of millions of instructions. MIPS is computed as the instruction count divided by the product of the execution time and 10^6. Word << correct answer >> A natural unit of access in a computer, usually a group of 32 bits. Double Word << correct answer >> Another natural unit of access in a computer, usually a group of 64 bits; corresponds to the size of a register in the LEGv8 architecture. Least Significant Bit << correct answer >> The rightmost bit in an LEGv8 doubleword. most significant bit << correct answer >> The leftmost bit in an LEGv8 doubleword Least Recently Used (LRU) << correct answer >> A replacement scheme in which the block replaced is the one that has been unused for the longest time. branch address table (branch table) << correct answer >> a table of addresses of alternative instruction sequences caller << correct answer >> The program that instigates a procedure and provides the necessary parameter values. Stack << correct answer >> A data structure for spilling registers organized as a last-in- first-out queue. Stack Pointer << correct answer >> A value denoting the most recently allocated address in a stack that shows where registers should be spilled or where old register values can be found. In MIPS, it is register $sp. Push << correct answer >> Add element to stack. Pop << correct answer >> Remove element from stack.