Computer Science An Overview 11th Edition By J. Glenn Brookshear - Test Bank

Test Bank—Chapter Two (Data Manipulation) The following table is from Appendix C of the text. It is included here so that it can be incorporated in tests for student reference. Questions in this test bank refer to this table as the “language description table.” Op- code Operand Description 1 RXY LOAD the register R with the bit pattern found in the memory cell whose address is XY. Example: 14A3 would cause the contents of the memory cell located at address A3 to be placed in register 4. 2 RXY LOAD the register R with the bit pattern XY. Example: 20A3 would cause the value A3 to be placed in register 0. 3 RXY STORE the bit pattern found in register R in the memory cell whose address is XY. Example: 35B1 would cause the contents of register 5 to be placed in the memory cell whose address is B1. 4 0RS MOVE the bit pattern found in register R to register S. Example: 40A4 would cause the contents of register A to be copied into register 4. 5 RST ADD the bit patterns in registers S and T as though they were two’s complement representations and leave the result in register R. Example: 5726 would cause the binary values in registers 2 and 6 to be added and the sum placed in register 7. 6 RST ADD the bit patterns in registers S and T as though they represented values in floating-point notation and leave the floating-point result in register R. Example: 634E would cause the values in registers 4 and E to be added as floating-point values and the result to be placed in register 3. 7 RST OR the bit patterns in registers S and T and place the result in register R. Example: 7CB4 would cause the result of ORing the contents of registers B and 4 to be placed in register C. 8 RST AND the bit patterns in register S and T and place the result in register R. Example: 8045 would cause the result of ANDing the contents of registers 4 and 5 to be placed in register 0. 9 RST EXCLUSIVE OR the bit patterns in registers S and T and place the result in register R. Example: 95F3 would cause the result of EXCLUSIVE ORing the contents of registers F and 3 to be placed in register 5. A R0X ROTATE the bit pattern in register R one bit to the right X times. Each time place the bit that started at the low-order end at the high-order end. Example: A403 would cause the contents of register 4 to be rotated 3 bits to the right in a circular fashion. B RXY JUMP to the instruction located in the memory cell at address XY if the bit pattern in register R is equal to the bit pattern in register number 0. Otherwise, continue with the normal sequence of execution. (The jump is implemented by copying XY into the program counter during the execute phase.) Example: B43C would first compare the contents of register 4 with the contents of register 0. If the two were equal, the pattern 3C would be placed in the program counter so that the next instruction executed would be the one located at that memory address. Otherwise, nothing would be done and program execution would continue in its normal sequence. C 000 HALT execution. Example: C000 would cause program execution to stop. Multiple Choice Questions 1. Which of the following is not contained in a CPU? A. Instruction register B. Program counter C. General-purpose register D. Memory cell ANSWER: D 2. Which of the following instructions (as described in the language description table) changes the contents of a memory cell? A. 10AB B. 20AB C. 30AB D. 40AB ANSWER: C 3. Which of the following instructions (as described in the language description table) places in register A? A. 1A00 B. 2A00 C. 3A00 D. 200A ANSWER: B 4. Which of the following instructions (as described in the language description table) places in register 5? A. 25FF B. 9555 C. 15FF D. 8555 ANSWER: B 5. Which of the following instructions (as described in the language description table) will not change the contents of register 5? A. 1508 B. 2508 C. A503 D. A508 ANSWER: D 6. Which of the following instructions (as described in the language description table) is equivalent to requesting that register A be rotated to the left by three bits? A. AA05 B. AA03 C. AA08 D. AA01 ANSWER: A 7. Which of the following instructions (as described in the language description table) changes the contents of register 7? A. 4077 B. 4075 C. 4057 D. 37BB ANSWER: C 8. Which of the following is not a form of parallel processing? A. SISD B. MIMD C. SIMD ANSWER: A 9. In which of the following locations is information most readily available for manipulation by the CPU? A. Cache memory B. Main memory C. Mass storage D. General-purpose registers ANSWER: D 10. The bus in a computer is an example of which form of communication? A. Serial B. Parallel C. Neither A nor B ANSWER: B 11. Which of the following instructions does not fall in the category of arithmetic/logic instructions? A. ROTATE B. ADD C. OR D. JUMP ANSWER: D 12. Which of the following instructions falls in the category of data transfer instructions? A. LOAD B. AND C. ROTATE D. JUMP ANSWER: A 13. Which of the following is not a component of a machine instruction? A. Op-code B. Port C. Operand ANSWER: B 14. Which of the following is not an activity performed entirely within a CPU? A. Fetch instructions B. Perform Boolean operations C. Perform arithmetic operations D. Move data between registers ANSWER: A 15. What mask in register F would cause the instruction 8AAF (refer to the language description table) to put a 0 in the most significant bit of register A without disturbing the other bits? A. B. C. D. ANSWER: D 16. What mask in register F would cause the instruction 7AAF (refer to the language description table) to put a 1 in the most significant bit of register A without disturbing the other bits? A. B. C. D. ANSWER: C 17. Which of the following instructions will not produce the same result as the other two? (Refer to the language description table.) A. A502 B. A506 C. A50A ANSWER: B 18. Which of the following instructions will not produce the same result as the other two? (Refer to the language description table.) A. 9555 B. 2500 C. 1500 ANSWER: C 19. If register A contained the pattern , which of the following instructions could alter the contents of register 0? (Refer to the language description table.) A. 700A B. 800A C. 900A ANSWER: B 20. Which of the following instructions (as described in the language description table) is essentially an unconditional jump? A. B033 B. B133 C. B233 D. B333 ANSWER: A 21. Which step of the machine cycle examines the op-code of the next instruction to be executed? A. Load B. Fetch C. Decode D. Execute ANSWER: C 22. An ARM based processor is an example of what kind of computer architecture? A. DSL B. CISC C. RISC D. Pentium ANSWER: C Fill-in-the-blank/Short-answer Questions 1. If register 0 contains the pattern before executing the instruction A003 (see the language description table), what bit pattern will be in register 0 after the instruction is executed? ____________ ANSWER: 2. If registers 5 and 6 contain the bit patterns 5A and 58 respectively, what bit pattern will be in register 4 after executing the instruction 5456? (See language description table.) ____________ ANSWER: B2 3. If registers 5 and 6 contain the bit patterns 5A and 58 respectively, what bit pattern will be in register 4 after executing the instruction 6456? (See language description table and assume a floating-point format in which the most significant bit is the sign bit, the next three bits represent the exponent field in excess notation, and the last four bits represent the mantissa.) ____________ ANSWER: 69 4. Write the answer to each of the following logic problems. AND OR XOR ANSWER: , , and 5. Suppose registers E and F contained AA and CC, respectively. What bit pattern would be in register D after executing each of the following instructions (see language description table)? A. 7DEF __________ B. 8DEF __________ C. 9DEF __________ ANSWER: A. EE B. 88 C. 66 6. If registers 0, 1, and 2 contain the patterns A5, A5, and B7, respectively, which of the following instructions will result in a jump to location AA? (Refer to the language description table.) A. B0AA B. B1AA C. B2AA ____________ ANSWER: A and B 7. If registers 0 and 1 contain the patterns B5 and F0, respectively, what will be in register 1 after executing each of the following instructions? (Refer to the language description table.) A. A102 __________ B. 4001 __________ C. 4010 __________ ANSWER: A. 3C B. B5 C. F0 8. Suppose the instruction B1A5 (as described in the language description table) is stored in main memory at addresses E0 and E1. Moreover, suppose registers 0 and 1 both contain the pattern FF. What value will be in the CPU’s program counter immediately after executing the instruction? ____________ ANSWER: A5 9. Suppose the instruction B1A5 (as described in the language description table) is stored in main memory at addresses E0 and E1. Moreover, suppose registers 0 and 1 contain the patterns FF and 75, respectively. What value will be in the CPU’s program counter immediately after executing the instruction? ____________ ANSWER: E2 10. Encode each of the following commands in terms of the machine language described in the language description table. A. __________ LOAD register 7 with the value A5. B. __________ LOAD register 7 with the contents of the memory cell at address A5. C. __________ ADD the contents of registers 5 and 6 as thought they were values in two’s complement notation and leave the result in register 4. D. __________ OR the contents of registers 5 and 6, leaving the result in register 4. ANSWER: A. 27A5 B. 17A5 C. 5456 (or 5465) D. 7456 (or 7465) 11. Encode each of the following commands in terms of the machine language described in the language description table. A. __________ ROTATE the contents of register 7 to the right 5 bit positions. B. __________ JUMP to the instruction at address B2 if the content of register 2 equals that of register 0. C. __________ ADD the contents of registers 5 and 6 as thought they were values in floating- point notation and leave the result in register 4. D. __________ AND the contents of registers 5 and 6, leaving the result in register 4. ANSWER: A. A705 B. B2B2 C. 6456 (or 6465) D. 8456 (or 8465) 12. Decode each of the following instructions that were encoded using the language description table. A. 4034 ___________________________________________________________ B. 8023 ___________________________________________________________ C. B288 ___________________________________________________________ D. 2345 ___________________________________________________________ ANSWER: A. MOVE the contents of register 3 to register 4. B. AND the contents of registers 2 and 3, leaving the result in register 0. C. JUMP to the instruction at address 88 if the contents of register 2 equals that of register 0. D. LOAD register 3 with the pattern 45. 13. Decode each of the following instructions that were encoded using the language description table. A. A004 ___________________________________________________________ B. 1234 ___________________________________________________________ C. 5678 ___________________________________________________________ D. C000 ___________________________________________________________ ANSWER: A. ROTATE the contents of register 0 to the right by four bit positions. B. LOAD register 2 with the bit pattern from the memory cell at address 34. C. ADD the contents of registers 7 and 8 as though they represented values encoded in two’s complement notation and leave the result in register 6. D. HALT. 14. The following table shows a portion of a machine's memory containing a program written in the language described in the language description table. Answer the questions below assuming that the machine is started with its program counter containing 00. address content 00 21 01 0B 02 14 03 04 04 C0 05 00 A. What bit pattern will be in register 4 when the machine halts? ___________ B. What bit pattern will be in register 1 when the machine halts? ___________ ANSWER: A. C0 B. 0B 15. The following table shows a portion of a machine's memory containing a program written in the language described in the language description table. Answer the questions below assuming that the machine is started with its program counter containing 00. address content address content 00 10 07 00 01 02 08 C0 02 24 09 00 03 04 0A C0 04 B4 0B 00 05 0A 0C C0 06 C0 0D 00 A. What bit pattern will be in register 0 when the machine halts? ___________ B. What bit pattern will be in register 4 when the machine halts? ___________ C. What bit pattern will be in the program counter when the machine halts? ___________ ANSWER: A. 24 B. 04 C. 08 16. The following table shows a portion of a machine's memory containing a program written in the language described in the language description table. Answer the questions below assuming that the machine is started with its program counter containing 00. address content address content 00 25 07 00 01 03 08 C0 02 20 09 00 03 F9 0A C0 04 53 0B 00 05 05 0C C0 06 33 0D 00 A. What bit pattern will be in register 5 when the machine halts? ____________ B. What bit pattern will be in register 0 when the machine halts? ____________ C. What bit pattern will be in register 3 when the machine halts? ____________ D. What bit pattern will be at memory location 00 when the machine halts? ____________ ANSWER: A. 03 B. F9 C. FC D. FC 17. The following table shows a portion of a machine's memory containing a program written in the language described in the language description table. Answer the questions below assuming that the machine is started with its program counter containing 00. address content address content 00 25 07 00 01 03 08 34 02 A5 09 04 03 02 0A B0 04 35 0B 03 05 03 0C C0 06 24 0D 00 A. What bit pattern will be in register 5 when the machine halts? ____________ B. What bit pattern will be in the program counter when the machine halts? ____________ C. What bit pattern will be at memory location 04 when the machine halts? ____________ ANSWER: A. C0 B. 05 C. 00 18. Below is a short routine written in the machine language described in the language description table and stored in a machine's memory beginning at address 50. What must be in the memory cell at address 40 to avoid an unending loop? Address Instruction 50 2001 52 1340 54 8330 56 B352 58 ... ________________________________________ ANSWER: Any bit pattern whose least significant bit is 0 19. The following table shows a portion of a machine's memory containing a program written in the language described in the language description table. Answer the questions below assuming that the machine is started with its program counter containing 00. address content address content 00 B0 07 C0 01 03 08 00 02 25 09 23 03 B0 0A B0 04 0C 0B 03 05 C0 0C B0 06 00 0D 07 A. How many instructions will be executed before the machine halts? ____________ B. What bit pattern will be in the program counter when the machine halts? ____________ ANSWER: A. 4 B. 09 20. The following table shows a portion of a machine's memory containing a program written in the language described in the language description table. Answer the questions below assuming that the machine is started with its program counter containing 00. address content address content 00 20 07 12 01 02 08 B2 02 21 09 0C 03 01 0A B0 04 22 0B 06 05 01 0C C0 06 52 0D 00 A. What bit pattern will be in register 2 when the machine halts? ___________ B. How many times will the instruction at address 06 be executed before the machine halts? ___________ ANSWER: A. 02 B. 2 21. What is used to differentiate memory used for instructions and memory used for data? ANSWER: Nothing. Instructions and data can located anywhere in main memory. The machine alone has no way of knowing what portions are used for data and what portions are instructions. Vocabulary (Matching) Questions The following is a list of terms from the chapter along with descriptive phrases that can be used to produce questions (depending on the topics covered in your course) in which the students are ask to match phrases and terms. An example would be a question of the form, “In the blank next to each phrase, write the term from the following list that is best described by the phrase.” Term Descriptive Phrase op-code The part of a machine instruction that identifies the basic operation to be performed machine language A means of encoding instructions machine cycle The process of fetching and executing instructions that is repeated over and over by the CPU register A location within a CPU for temporary data storage masking A means of isolating particular bits within a bit pattern bus The communication path between a CPU and main memory memory-mapped I/O The technique of communicating with peripheral devices as though they were memory cells pipeling A means of processing more than one instruction at a time instruction register Register whose contents is modified upon performing the fetch step of the machine cycle stored-program concept A technique of recording programs in main memory from where they can be accessed and executed program counter Used by the CPU to keep its place in the program being executed main memory from where they can be retrieved and executed controller The interface between “a computer” and a peripheral device modem Modulator-demodulator port The “connection” through which a CPU communicates with a peripheral device USB A communication system by which a variety of peripheral devices can be connected to a computer clock Used to synchronize the operations within a computer status word A means by which a peripheral device reports its condition bps A means of measuring the rate of data transfer CISC A computer whose machine language contains many complex Instructions cache High-speed memory located within the CPU which is used to retain a copy of portions of main memory that is of current interest handshaking Refers to the two-way communication that takes place between a computer an a peripheral device bandwidth Refers to a communication path’s maximum capacity for transferring data DMA The ability of a peripheral device to communicate directly with a computer’s main memory General Format Questions 1. Describe the machine cycle. ANSWER: Fetch an instruction and increment the program counter, decode the instruction, and execute the instruction. 2. Explain the concept of throughput and techniques by which throughput is increased. ANSWER: Throughput measures the amount of “work” performed by a computer rather than the speed with which the computer executes instructions. Throughput is increased by introducing parallel processing techniques such as pipeling or parallel processing via multiprocessor designs. 3. What is the difference between a conditional jump instruction and an unconditional jump instruction? ANSWER: A conditional jump instruction will result in a “jump” to another location only under certain conditions whereas an unconditional jump instruction will result in a “jump” to another location under all conditions. 4. The following is a routine encoded in the machine language described in the language description table. Explain (in a single sentence) what the routine does. (Explain what the entire routine does as a unit rather than reciting what each instruction does.) 12A0 32B0 12A1 32B1 12A2 32B2 ANSWER: It copies the contents of memory cells A0 through A2 to memory cells B0 through B2. 5. The following is a routine encoded in the machine language described in the language description table. Explain (in a single sentence) what the routine does. (Explain what the entire routine does as a unit rather than reciting what each instruction does.) 210F 12A0 8212 32A0 ANSWER: It places 0s in the four most significant bits of memory cell A0 without disturbing the other four bits. 6. The following table shows a portion of a machine's memory containing a program written in the language described in the language description table. What will happen if the machine is started with its program counter containing 00? address content 00 21 01 B0 02 31 03 04 04 C0 05 00 ANSWER: The machine will change the last instruction to a jump instruction and continue to repeat the same routine over and over. 7. Using the machine language described in the language description table, write a sequence of instructions that will place the pattern FF in the memory cell at address A0. ANSWER: 2XFF, 3XA0 (where X can be any register but must be the same in both instructions) 8. Using the machine language described in the language description table, write a sequence of instructions that will place a 1 in the most significant bit of the memory cell at address A0 without disturbing the other bits. ANSWER: 2X80, 1YA0, 7YXY, 3YA0 (where X and Y can be any distinct registers) 9. Using the machine language described in the language description table, write a sequence of instructions that will add five to the value (represented in two’s complement notation) stored at memory address A0. ANSWER: 2X05, 1YA0, 5YXY, 3YA0 (where X and Y can be any distinct registers) 10. Using the machine language described in the language description table, write a sequence of instructions that will subtract one from the value (represented in two’s complement notation) stored at memory address A0. ANSWER: 2XFF, 1YA0, 5YXY, 3YA0 (where X and Y can be any distinct registers) 11. Using the machine language described in the language description table, write a sequence of instructions that will shift the contents of the memory cell at address A0 three bit positions to the right while filling the holes at the left end with 0s. ANSWER: 1XA0, AX03, 2Y1F, 8XXY, 3XA0 (where X and Y can be any distinct registers)