OCR A-Level Computer Science paper 1
terms
1 Dimensional Arrays>>> A standard list array - one index is needed to search for something in
an array.
2 Dimensional Arrays>>> An array with 2 indexes needed to search - for example a table could
be this.
Interception of PseudoCode>>> The ability to pick out and explain parts of code.
Big O'>>> A measure of complexity within a piece of code.
Recursion>>> The process of looping, calling itself in looping.
Functions>>> A decomposed part of code that has a specific job to output or return something
Iteration>>> Repeating some part of code over and over
Subroutine>>> A decomposed part of problem that *does something*
Data Mining>>> The process of collecting data on user habits or requests
Binary Search>>> A search algorithm that includes comparing the midpoint of an array
iteratively.
Insertion Sort>>> A sorting algorithm that includes going through an array iteratively comparing
each value to every value before that value.
Bubble Sort>>> Moving through a list, it compared two elements and moves on, moving through
the array repeatedly.
Quick Sort>>>
Merge Sort>>>
Global Variable>>>
Local Variable>>>
Dijkstra's Algorithm>>>
Travelling Salesman Algorithm>>>
Decomposition>>>
Graph Tree>>>
Heuristic>>>
Pipelining>>>
Stack>>>
ALU (Arithmetic Logic Unit)>>> The part of the CPU where data is processed and manipulated.
Usually arithmetic or logical operations. Allows for decisions to be made.
Control Unit>>> The part of the CPU that manages the execution of instructions. The control
unit fetches an instruction, and decodes it before executing it by sending 'control signals' to other
parts of the computer.
Register>>> Tiny stores of extremely fast memory located in the CPU, normally designed for
where data or control information is stored temporarily when execution is taking place.
Program Counter (PC)>>> A register in the control unit which holds the address of the next
instruction to be executed. When each program is executed, this number goes up by 1 to signify
the next 'fetch' to be at this address in the RAM.
, Accumulator (ACC)>>> A special register within the Arithmetic Unit. It is used to hold the data
currently being processed by the CPU. Any data to be processed is stored temporarily in the
accumulator.
Memory Address Register (MAR)>>> A register in the CPU that stores the address of the
memory location currently in use. In the fetch phase, this would be the address of an instruction;
in the execute phase, it would be the address of the data being used.
Memory Data Register (MDR)>>> Used to temporarily store data loaded into the CPU, or
written to memory locations. All transfers from memory locations to the CPU go via the Memory
Data Register.
Current Instruction Register (CIR)>>> A register in the control unit that stores the instruction
type of the next instruction to be carried out by the processor. For example, this could contain the
number 3, which in LMC is a 'store' function.
Buses>>> A common physical pathway for signals to travel to and from several components of a
computer.
Data Bus>>> Transfers the data from memory location specified by MAR.
Address Bus>>> The part of the bus which carries information about where the data is being
sent.
Control Bus>>> This bus carries command and control signals to and from every other
component of a computer.
Fetch>>> Decode-Execute - The complete process of retrieving an instruction from a memory
source, decoding it and carrying it out (execution). Also known as the instruction cycle.
Central Processing Unit (CPU)>>> The main part of the computer, consisting of the registers,
ALU and control unit.
Clock Speed>>> Measured in Hertz, the clock speed is the frequency at which the 'internal clock
generates pulses'. This means how fast it can execute instructions. The higher the clock rate, the
faster the computer may work. The "clock" is an electronic unit that synchronizes other
components by generating pulses of electricity at a constant rate (almost like waves).
Cores>>> A CPU is one 'Core'. A multi-core processor is a single component with two or more
independent actual CPU's, which are the units responsible for the fetch-decode-execute cycle.
Theoretically, this could 'double' speed but depends on efficiency of splitting up tasks.
Cache>>> A part of the main store between the central processor and the RAM. It has extremely
fast access, so sections of a program and other data is copied there to take advantage of its short
fetch cycle.
LMC STA>>> Store function, puts the value in the accumulator into the storage location
specified.
LMC LDA>>> Loads data from the storage location specified into the accumulator.
LMC BRA>>> 'Branches' the next instruction to the address given.
LMC BRP>>> 'Branches' the next intruction to the address given if the value in the accumulator
is positive or zero.
LMC BRZ>>> 'Branches' the next intruction to the address given if the value in the accumulator
is zero.
Pipelining>>> An attempt to make machine code as efficient as possible. It relies on the ability
for the CPU to split up instructions - it can then fetch, decode, and execute all parts of the
instruction at the same time.
Flushing the Pipe>>> During Pipelining, instructions can cause corruption issues if something is
being outputted that could cause more problems. (the thing being currently processed could
terms
1 Dimensional Arrays>>> A standard list array - one index is needed to search for something in
an array.
2 Dimensional Arrays>>> An array with 2 indexes needed to search - for example a table could
be this.
Interception of PseudoCode>>> The ability to pick out and explain parts of code.
Big O'>>> A measure of complexity within a piece of code.
Recursion>>> The process of looping, calling itself in looping.
Functions>>> A decomposed part of code that has a specific job to output or return something
Iteration>>> Repeating some part of code over and over
Subroutine>>> A decomposed part of problem that *does something*
Data Mining>>> The process of collecting data on user habits or requests
Binary Search>>> A search algorithm that includes comparing the midpoint of an array
iteratively.
Insertion Sort>>> A sorting algorithm that includes going through an array iteratively comparing
each value to every value before that value.
Bubble Sort>>> Moving through a list, it compared two elements and moves on, moving through
the array repeatedly.
Quick Sort>>>
Merge Sort>>>
Global Variable>>>
Local Variable>>>
Dijkstra's Algorithm>>>
Travelling Salesman Algorithm>>>
Decomposition>>>
Graph Tree>>>
Heuristic>>>
Pipelining>>>
Stack>>>
ALU (Arithmetic Logic Unit)>>> The part of the CPU where data is processed and manipulated.
Usually arithmetic or logical operations. Allows for decisions to be made.
Control Unit>>> The part of the CPU that manages the execution of instructions. The control
unit fetches an instruction, and decodes it before executing it by sending 'control signals' to other
parts of the computer.
Register>>> Tiny stores of extremely fast memory located in the CPU, normally designed for
where data or control information is stored temporarily when execution is taking place.
Program Counter (PC)>>> A register in the control unit which holds the address of the next
instruction to be executed. When each program is executed, this number goes up by 1 to signify
the next 'fetch' to be at this address in the RAM.
, Accumulator (ACC)>>> A special register within the Arithmetic Unit. It is used to hold the data
currently being processed by the CPU. Any data to be processed is stored temporarily in the
accumulator.
Memory Address Register (MAR)>>> A register in the CPU that stores the address of the
memory location currently in use. In the fetch phase, this would be the address of an instruction;
in the execute phase, it would be the address of the data being used.
Memory Data Register (MDR)>>> Used to temporarily store data loaded into the CPU, or
written to memory locations. All transfers from memory locations to the CPU go via the Memory
Data Register.
Current Instruction Register (CIR)>>> A register in the control unit that stores the instruction
type of the next instruction to be carried out by the processor. For example, this could contain the
number 3, which in LMC is a 'store' function.
Buses>>> A common physical pathway for signals to travel to and from several components of a
computer.
Data Bus>>> Transfers the data from memory location specified by MAR.
Address Bus>>> The part of the bus which carries information about where the data is being
sent.
Control Bus>>> This bus carries command and control signals to and from every other
component of a computer.
Fetch>>> Decode-Execute - The complete process of retrieving an instruction from a memory
source, decoding it and carrying it out (execution). Also known as the instruction cycle.
Central Processing Unit (CPU)>>> The main part of the computer, consisting of the registers,
ALU and control unit.
Clock Speed>>> Measured in Hertz, the clock speed is the frequency at which the 'internal clock
generates pulses'. This means how fast it can execute instructions. The higher the clock rate, the
faster the computer may work. The "clock" is an electronic unit that synchronizes other
components by generating pulses of electricity at a constant rate (almost like waves).
Cores>>> A CPU is one 'Core'. A multi-core processor is a single component with two or more
independent actual CPU's, which are the units responsible for the fetch-decode-execute cycle.
Theoretically, this could 'double' speed but depends on efficiency of splitting up tasks.
Cache>>> A part of the main store between the central processor and the RAM. It has extremely
fast access, so sections of a program and other data is copied there to take advantage of its short
fetch cycle.
LMC STA>>> Store function, puts the value in the accumulator into the storage location
specified.
LMC LDA>>> Loads data from the storage location specified into the accumulator.
LMC BRA>>> 'Branches' the next instruction to the address given.
LMC BRP>>> 'Branches' the next intruction to the address given if the value in the accumulator
is positive or zero.
LMC BRZ>>> 'Branches' the next intruction to the address given if the value in the accumulator
is zero.
Pipelining>>> An attempt to make machine code as efficient as possible. It relies on the ability
for the CPU to split up instructions - it can then fetch, decode, and execute all parts of the
instruction at the same time.
Flushing the Pipe>>> During Pipelining, instructions can cause corruption issues if something is
being outputted that could cause more problems. (the thing being currently processed could
